gma tgl: Factor power-domain handling out
ADL-P brings new power domains with different dependencies. Let's
make room for an alternative implementation.
This breaks building the ADL-P config until its implementation is
added in a follow-up commit.
Change-Id: I38d6702fe34536ba5d4023f1b1f2e4a979df21b9
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/508
Reviewed-by: Thomas Heijligen <src@posteo.de>
diff --git a/common/tigerlake/Makefile.inc b/common/tigerlake/Makefile.inc
index 7fd9447..3d42b28 100644
--- a/common/tigerlake/Makefile.inc
+++ b/common/tigerlake/Makefile.inc
@@ -2,6 +2,8 @@
gfxinit-y += hw-gfx-gma-combo_phy.ads
gfxinit-y += hw-gfx-gma-power_and_clocks.adb
gfxinit-y += hw-gfx-gma-power_and_clocks.ads
+gfxinit-y += hw-gfx-gma-power_domains_common.adb
+gfxinit-y += hw-gfx-gma-power_domains_common.ads
gfxinit-y += hw-gfx-gma-connectors.adb
gfxinit-y += hw-gfx-gma-connectors-tc.adb
gfxinit-y += hw-gfx-gma-connectors-tc.ads
@@ -17,6 +19,8 @@
gfxinit-y += hw-gfx-gma-plls-dekel_phy.ads
ifneq ($(filter Tigerlake,$(CONFIG_GFX_GMA_GENERATION)),)
+gfxinit-y += tgl/hw-gfx-gma-power_domains.adb
+gfxinit-y += tgl/hw-gfx-gma-power_domains.ads
gfxinit-y += tgl/hw-gfx-gma-connectors-tc-ownership.adb
else ifneq ($(filter AlderlakeP,$(CONFIG_GFX_GMA_GENERATION)),)
gfxinit-y += xelpd/hw-gfx-gma-connectors-tc-ownership.adb
diff --git a/common/tigerlake/hw-gfx-gma-power_and_clocks.adb b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
index 1573777..48cdf60 100644
--- a/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
+++ b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
@@ -19,7 +19,6 @@
with HW.GFX.GMA.PCode;
with HW.GFX.GMA.Registers;
with HW.GFX.GMA.Transcoder;
-with HW.GFX.GMA.Connectors.TC.Ownership;
use type HW.Word64;
@@ -27,68 +26,6 @@
subtype CDClk_Range is Config.CDClk_Range;
- type Power_Domain is
- (PW1, PW2, PW3, PW4, PW5,
- DDI_A, DDI_B, DDI_C,
- DDI_USBC1, DDI_USBC2, DDI_USBC3, DDI_USBC4, DDI_USBC5, DDI_USBC6,
- AUX_A, AUX_B, AUX_C,
- AUX_USBC1, AUX_USBC2, AUX_USBC3, AUX_USBC4, AUX_USBC5, AUX_USBC6);
- type Power_Domain_Types is (Power_Well, Power_DDI, Power_AUX);
- subtype Dynamic_Domain is Power_Domain range PW2 .. Power_Domain'Last;
- subtype PW_Domain is Power_Domain range PW1 .. PW5;
- subtype Dynamic_Well is Power_Domain range PW2 .. PW_Domain'Last;
- subtype Port_Domain is Power_Domain range DDI_A .. AUX_USBC6;
- subtype DDI_Domain is Power_Domain range DDI_A .. DDI_USBC6;
- subtype DDI_USBC_Domain is Power_Domain range DDI_USBC1 .. DDI_USBC6;
- subtype AUX_Domain is Power_Domain range AUX_A .. AUX_USBC6;
- subtype AUX_USBC_Domain is Power_Domain range AUX_USBC1 .. AUX_USBC6;
-
- function PW_Index (PW : PW_Domain) return Natural
- is
- (Power_Domain'Pos (PW) - Power_Domain'Pos (PW_Domain'First));
-
- function DDI_Index (DDI : DDI_Domain) return Natural
- is
- (Power_Domain'Pos (DDI) - Power_Domain'Pos (DDI_Domain'First));
-
- function AUX_Index (AUX : AUX_Domain) return Natural
- is
- (Power_Domain'Pos (AUX) - Power_Domain'Pos (AUX_Domain'First));
-
- function AUX_USBC_Index (AUX: AUX_USBC_Domain) return Natural
- is
- (Power_Domain'Pos (AUX) - Power_Domain'Pos (AUX_USBC_Domain'First));
-
- ----------------------------------------------------------------------------
-
- function Power_Domain_Type (PD : Power_Domain) return Power_Domain_Types
- is
- (if PD in PW_Domain then Power_Well
- elsif PD in DDI_Domain then Power_DDI
- else Power_AUX);
-
- type Power_Well_Regs is array (Power_Domain_Types) of Registers.Registers_Index;
- PWR_CTL_BIOS : constant Power_Well_Regs :=
- (Power_Well => Registers.PWR_WELL_CTL_BIOS,
- Power_DDI => Registers.PWR_DDI_CTL_BIOS,
- Power_AUX => Registers.PWR_AUX_CTL_BIOS);
- PWR_CTL_DRIVER : constant Power_Well_Regs :=
- (Power_Well => Registers.PWR_WELL_CTL_DRIVER,
- Power_DDI => Registers.PWR_DDI_CTL_DRIVER,
- Power_AUX => Registers.PWR_AUX_CTL_DRIVER);
-
- function Power_State_Mask (PD : Power_Domain) return Word32
- is
- (case PD is
- when PW_Domain'Range => 1 * 2 ** (2 * PW_Index (PD)),
- when DDI_Domain'Range => 1 * 2 ** (2 * DDI_Index (PD)),
- when AUX_Domain'Range => 1 * 2 ** (2 * AUX_Index (PD)));
-
- function Power_Request_Mask (PD : Power_Domain) return Word32 is
- begin
- return Shift_Left (Power_State_Mask (PD), 1);
- end Power_Request_Mask;
-
----------------------------------------------------------------------------
PCH_DPMGUNIT_CLOCK_GATE_DISABLE : constant := 1 * 2 ** 15;
@@ -142,37 +79,6 @@
----------------------------------------------------------------------------
- function HIP_INDEX_REG (Aux : AUX_USBC_Domain) return Registers.Registers_Index
- is
- (if Aux <= AUX_USBC4
- then Registers.HIP_INDEX_REG0
- else Registers.HIP_INDEX_REG1);
-
- function HIP_INDEX_VAL (Aux : AUX_USBC_Domain; Val : Word32) return Word32
- is
- (Val * 2 ** (8 * (AUX_USBC_Index (Aux) mod 4)));
-
- type DKL_Regs is array (AUX_USBC_Domain) of Registers.Registers_Index;
- DKL_CMN_UC_DW_27 : constant DKL_Regs :=
- (AUX_USBC1 => Registers.DKL_CMN_UC_DW_27_1,
- AUX_USBC2 => Registers.DKL_CMN_UC_DW_27_2,
- AUX_USBC3 => Registers.DKL_CMN_UC_DW_27_3,
- AUX_USBC4 => Registers.DKL_CMN_UC_DW_27_4,
- AUX_USBC5 => Registers.DKL_CMN_UC_DW_27_5,
- AUX_USBC6 => Registers.DKL_CMN_UC_DW_27_6);
-
- ----------------------------------------------------------------------------
-
- FUSE_STATUS_PG0_DIST_STATUS : constant := 1 * 2 ** 27;
- FUSE_STATUS_PGx_DIST_STATUS : constant array (PW_Domain) of Word32 :=
- (PW1 => 1 * 2 ** 26,
- PW2 => 1 * 2 ** 25,
- PW3 => 1 * 2 ** 24,
- PW4 => 1 * 2 ** 23,
- PW5 => 1 * 2 ** 22);
-
- ----------------------------------------------------------------------------
-
TGL_PCODE_MEM_SUBSYSTEM_INFO : constant := 16#d#;
TGL_PCODE_MEM_SS_READ_GLOBAL_INFO : constant := 0 * 2 ** 8;
TGL_PCODE_CDCLK_CONTROL : constant := 7;
@@ -192,176 +98,6 @@
----------------------------------------------------------------------------
- type AUX_CTL_Array is array (AUX_USBC_Domain) of Registers.Registers_Index;
- AUX_CTL_Regs : constant AUX_CTL_Array :=
- (AUX_USBC1 => Registers.DDI_AUX_CTL_USBC1,
- AUX_USBC2 => Registers.DDI_AUX_CTL_USBC2,
- AUX_USBC3 => Registers.DDI_AUX_CTL_USBC3,
- AUX_USBC4 => Registers.DDI_AUX_CTL_USBC4,
- AUX_USBC5 => Registers.DDI_AUX_CTL_USBC5,
- AUX_USBC6 => Registers.DDI_AUX_CTL_USBC6);
-
- ----------------------------------------------------------------------------
-
- function To_GPU_Port (PD : Port_Domain) return GPU_Port
- is
- (case PD is
- when DDI_A | AUX_A => DIGI_A,
- when DDI_B | AUX_B => DIGI_B,
- when DDI_C | AUX_C => DIGI_C,
- when DDI_USBC1 | AUX_USBC1 => DDI_TC1,
- when DDI_USBC2 | AUX_USBC2 => DDI_TC2,
- when DDI_USBC3 | AUX_USBC3 => DDI_TC3,
- when DDI_USBC4 | AUX_USBC4 => DDI_TC4,
- when DDI_USBC5 | AUX_USBC5 => DDI_TC5,
- when DDI_USBC6 | AUX_USBC6 => DDI_TC6);
-
- procedure Pre_PD_On (PD : in Power_Domain; Success : out Boolean)
- is
- DP_AUX_CH_CTL_TBT_IO : constant := 1 * 2 ** 11;
- begin
- if PD in AUX_USBC_Domain then
- -- Disable TBT IO mode for AUX
- Registers.Unset_Mask
- (Register => AUX_CTL_Regs (PD),
- Mask => DP_AUX_CH_CTL_TBT_IO);
- Connectors.TC.Ownership.Claimed (To_GPU_Port (PD), Success);
- elsif PD = PW1 then
- Registers.Wait_Set_Mask
- (Register => Registers.FUSE_STATUS,
- Mask => FUSE_STATUS_PG0_DIST_STATUS,
- Success => Success);
- else
- Success := True;
- end if;
- end Pre_PD_On;
-
- procedure Post_PD_On (PD : Power_Domain)
- is
- DKL_CMN_UC_DW_27_UC_HEALTH : constant := 1 * 2 ** 15;
- begin
- if PD in PW_Domain then
- Registers.Wait_Set_Mask
- (Register => Registers.FUSE_STATUS,
- Mask => FUSE_STATUS_PGx_DIST_STATUS (PD),
- TOut_MS => 1);
- elsif PD in AUX_USBC_Domain then
- Registers.Write (HIP_INDEX_REG (PD), HIP_INDEX_VAL (PD, 2));
- Registers.Wait_Set_Mask
- (Register => DKL_CMN_UC_DW_27 (PD),
- Mask => DKL_CMN_UC_DW_27_UC_HEALTH,
- TOut_MS => 1);
- end if;
- end Post_PD_On;
-
- procedure Pre_PD_Off (PD : Power_Domain) is
- begin
- if PD in DDI_USBC_Domain then
- -- Could be moved to a higher level, but right now it's
- -- convenient to do it here: When requested to turn the
- -- power off, we know exactly that we don't want to use
- -- the port (anymore).
- Connectors.TC.Ownership.Disconnect (To_GPU_Port (PD));
- end if;
- end Pre_PD_Off;
-
- procedure PD_On (PD : Power_Domain)
- is
- Ctl1, Ctl2 : Word32;
- PD_Type : constant Power_Domain_Types := Power_Domain_Type (PD);
- Success : Boolean;
- begin
- Registers.Read (PWR_CTL_BIOS (PD_Type), Ctl1);
- Registers.Read (PWR_CTL_DRIVER (PD_Type), Ctl2);
-
- if ((Ctl1 or Ctl2) and Power_Request_Mask (PD)) = 0 then
- Registers.Wait_Unset_Mask
- (Register => PWR_CTL_DRIVER (PD_Type),
- Mask => Power_State_Mask (PD),
- TOut_MS => 1);
- end if;
-
- if (Ctl2 and Power_Request_Mask (PD)) = 0 then
- Pre_PD_On (PD, Success);
- if not Success then
- pragma Debug (Debug.Put_Line ("Connection flow failed!"));
- return;
- end if;
-
- Registers.Set_Mask (PWR_CTL_DRIVER (PD_Type), Power_Request_Mask (PD));
-
- Registers.Wait_Set_Mask
- (Register => PWR_CTL_DRIVER (PD_Type),
- Mask => Power_State_Mask (PD),
- TOut_MS => 1,
- Success => Success);
- pragma Debug (not Success, Debug.Put_Line ("Failed to enable power domain!"));
-
- if Success then
- Post_PD_On (PD);
- end if;
- end if;
- end PD_On;
-
- procedure PD_Off (PD : Power_Domain)
- is
- Ctl1, Ctl2 : Word32;
- PD_Type : constant Power_Domain_Types := Power_Domain_Type (PD);
- begin
- pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
-
- Registers.Read (PWR_CTL_BIOS (PD_Type), Ctl1);
- Registers.Read (PWR_CTL_DRIVER (PD_Type), Ctl2);
-
- if ((Ctl1 or Ctl2) and Power_Request_Mask (PD)) /= 0 then
- Registers.Wait_Set_Mask
- (Register => PWR_CTL_DRIVER (PD_Type),
- Mask => Power_State_Mask (PD),
- TOut_MS => 1);
-
- Pre_PD_Off (PD);
-
- Registers.Unset_Mask (PWR_CTL_DRIVER (PD_Type), Power_Request_Mask (PD));
- Registers.Unset_Mask (PWR_CTL_BIOS (PD_Type), Power_Request_Mask (PD));
- end if;
- end PD_Off;
-
- function Need_PW (PW : Dynamic_Well; Configs : Pipe_Configs) return Boolean
- is
- function Any_TC_Port return Boolean is
- (for some Pipe in Pipe_Index =>
- Configs (Pipe).Port /= Disabled and then
- Config_Helpers.To_GPU_Port (Pipe, Configs (Pipe).Port) in USBC_Port);
-
- function Any_Pipe_From (First : Pipe_Index) return Boolean is
- (for some Pipe in First .. Pipe_Index'Last => Configs (Pipe).Port /= Disabled);
-
- function VGA return Boolean is
- (Configs (Primary).Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET);
- begin
- case PW is
- when PW2 | PW3 =>
- return Any_Pipe_From (Secondary) or Any_TC_Port or VGA;
- when PW4 =>
- return Any_Pipe_From (Tertiary);
- when PW5 =>
- return False; -- Fourth pipe not supported yet.
- end case;
- end Need_PW;
-
- function Need_PD (PD : Dynamic_Domain; Configs : Pipe_Configs) return Boolean
- is
- function Any_Port_Is (Port : GPU_Port) return Boolean is
- (for some Pipe in Pipe_Index =>
- Configs (Pipe).Port /= Disabled and then
- Config_Helpers.To_GPU_Port (Pipe, Configs (Pipe).Port) = Port);
- begin
- return
- (case PD is
- when Dynamic_Well'Range => Need_PW (PD, Configs),
- when Port_Domain'Range => Any_Port_Is (To_GPU_Port (PD)));
- end Need_PD;
-
procedure Get_RefClk (RefClk : out RefClk_Range)
is
DSSM : Word32;
@@ -673,7 +409,7 @@
(Register => Registers.NDE_RSTWRN_OPT,
Mask => NDE_RSTWRN_OPT_RST_PCH_Handshake_En);
- PD_On (PW1);
+ Power_Domains_Common.PD_On (Power_Domains.PW1);
Get_Cur_CDClk (Config.CDClk);
Get_Max_CDClk (Config.Max_CDClk);
@@ -739,93 +475,6 @@
----------------------------------------------------------------------------
- procedure Power_Set_To (Configs : Pipe_Configs) is
- begin
- pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
-
- for PD in reverse Dynamic_Domain loop
- if not Need_PD (PD, Configs) then
- PD_Off (PD);
- end if;
- end loop;
-
- for PD in Dynamic_Domain loop
- if Need_PD (PD, Configs) then
- PD_On (PD);
- end if;
- end loop;
- end Power_Set_To;
-
- procedure Power_Up (Port : Active_Port_Type; Success : out Boolean)
- is
- GPU_Port : constant GMA.GPU_Port :=
- Config_Helpers.To_GPU_Port (Pipe_Index'First, Port);
-
- procedure On (Aux : AUX_Domain; DDI : DDI_Domain) is
- begin
- PD_On (PW1);
- if GPU_Port in USBC_Port then
- PD_On (PW2);
- PD_On (PW3);
- end if;
- PD_On (DDI);
-
- if GPU_Port in USBC_Port then
- Connectors.TC.Ownership.Claim
- (Port => GPU_Port,
- DP_Alt => Port in Physical_USBC_Ports,
- Success => Success);
- if not Success then
- return;
- end if;
- end if;
- PD_On (Aux);
-
- Success := True;
- end On;
- begin
- pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
-
- case GPU_Port is
- when GMA.DIGI_A => On (AUX_A, DDI_A);
- when GMA.DIGI_B => On (AUX_B, DDI_B);
- when GMA.DIGI_C => On (AUX_C, DDI_C);
- when GMA.DDI_TC1 => On (AUX_USBC1, DDI_USBC1);
- when GMA.DDI_TC2 => On (AUX_USBC2, DDI_USBC2);
- when GMA.DDI_TC3 => On (AUX_USBC3, DDI_USBC3);
- when GMA.DDI_TC4 => On (AUX_USBC4, DDI_USBC4);
- when GMA.DDI_TC5 => On (AUX_USBC5, DDI_USBC5);
- when GMA.DDI_TC6 => On (AUX_USBC6, DDI_USBC6);
- when others => Success := True;
- end case;
- end Power_Up;
-
- procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs) is
- begin
- pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
-
- -- Power wells only, Aux/DDI domains are enabled later on explicit request.
- for PW in Dynamic_Well loop
- if not Need_PW (PW, Old_Configs) and Need_PW (PW, New_Configs) then
- PD_On (PW);
- end if;
- end loop;
- end Power_Up;
-
- procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs)
- is
- begin
- pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
-
- for PD in reverse Dynamic_Domain loop
- if (Need_PD (PD, Old_Configs) or Need_PD (PD, Tmp_Configs)) and
- not Need_PD (PD, New_Configs)
- then
- PD_Off (PD);
- end if;
- end loop;
- end Power_Down;
-
procedure Pre_All_Off is
begin
Transcoder.PSR_Off;
@@ -845,9 +494,7 @@
-- Disable CDClk PLL. FIXME: Not implemented yet.
Set_CDClk (CDClk_Range'First);
- for PD in reverse Power_Domain loop
- PD_Off (PD);
- end loop;
+ Power_Domains_Common.All_Off;
Combo_Phy.All_Off;
end Post_All_Off;
diff --git a/common/tigerlake/hw-gfx-gma-power_and_clocks.ads b/common/tigerlake/hw-gfx-gma-power_and_clocks.ads
index c1ab521..fc68a9a 100644
--- a/common/tigerlake/hw-gfx-gma-power_and_clocks.ads
+++ b/common/tigerlake/hw-gfx-gma-power_and_clocks.ads
@@ -13,6 +13,8 @@
--
with HW.GFX.GMA.Config_Helpers;
+with HW.GFX.GMA.Power_Domains;
+with HW.GFX.GMA.Power_Domains_Common;
private package HW.GFX.GMA.Power_And_Clocks is
@@ -36,10 +38,18 @@
Post => Config_Helpers.Stable_FB (Configs'Old, Configs);
procedure Enable_CDClk;
- procedure Power_Set_To (Configs : Pipe_Configs);
- procedure Power_Up (Port : Active_Port_Type; Success : out Boolean);
- procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs);
- procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs);
+ procedure Power_Set_To (Configs : Pipe_Configs)
+ renames
+ Power_Domains_Common.Power_Set_To;
+ procedure Power_Up (Port : Active_Port_Type; Success : out Boolean)
+ renames
+ Power_Domains.Power_Up;
+ procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs)
+ renames
+ Power_Domains_Common.Power_Up;
+ procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs)
+ renames
+ Power_Domains_Common.Power_Down;
procedure Get_RefClk (RefClk : out RefClk_Range);
diff --git a/common/tigerlake/hw-gfx-gma-power_domains_common.adb b/common/tigerlake/hw-gfx-gma-power_domains_common.adb
new file mode 100644
index 0000000..5c94c3f
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-power_domains_common.adb
@@ -0,0 +1,284 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with GNAT.Source_Info;
+with HW.Debug;
+
+with HW.GFX.GMA.Config;
+with HW.GFX.GMA.Config_Helpers;
+with HW.GFX.GMA.Connectors.TC.Ownership;
+
+package body HW.GFX.GMA.Power_Domains_Common is
+
+ function DDI_Index (DDI : DDI_Domain) return Natural
+ is
+ (Power_Domain'Pos (DDI) - Power_Domain'Pos (DDI_Domain'First));
+
+ function AUX_Index (AUX : AUX_Domain) return Natural
+ is
+ (Power_Domain'Pos (AUX) - Power_Domain'Pos (AUX_Domain'First));
+
+ function AUX_USBC_Index (AUX: AUX_USBC_Domain) return Natural
+ is
+ (Power_Domain'Pos (AUX) - Power_Domain'Pos (AUX_USBC_Domain'First));
+
+ ----------------------------------------------------------------------------
+
+ FUSE_STATUS_PG0_DIST_STATUS : constant := 1 * 2 ** 27;
+
+ ----------------------------------------------------------------------------
+
+ type Domain_Types is (Power_Well, Power_DDI, Power_AUX);
+
+ function Domain_Type (PD : Power_Domain) return Domain_Types
+ is
+ (case PD is
+ when PW_Domain'Range => Power_Well,
+ when DDI_Domain'Range => Power_DDI,
+ when AUX_Domain'Range => Power_AUX);
+
+ type Power_Well_Regs is array (Domain_Types) of Registers.Registers_Index;
+ PWR_CTL_BIOS : constant Power_Well_Regs :=
+ (Power_Well => Registers.PWR_WELL_CTL_BIOS,
+ Power_DDI => Registers.PWR_DDI_CTL_BIOS,
+ Power_AUX => Registers.PWR_AUX_CTL_BIOS);
+ PWR_CTL_DRIVER : constant Power_Well_Regs :=
+ (Power_Well => Registers.PWR_WELL_CTL_DRIVER,
+ Power_DDI => Registers.PWR_DDI_CTL_DRIVER,
+ Power_AUX => Registers.PWR_AUX_CTL_DRIVER);
+
+ function Power_State_Mask (PD : Power_Domain) return Word32
+ is
+ (case PD is
+ when PW_Domain'Range => PW_State_Mask (PD),
+ when DDI_Domain'Range => 1 * 2 ** (2 * DDI_Index (PD)),
+ when AUX_Domain'Range => 1 * 2 ** (2 * AUX_Index (PD)));
+
+ function Power_Request_Mask (PD : Power_Domain) return Word32 is
+ begin
+ return Shift_Left (Power_State_Mask (PD), 1);
+ end Power_Request_Mask;
+
+ ----------------------------------------------------------------------------
+
+ function HIP_INDEX_REG (Aux : AUX_Domain) return Registers.Registers_Index
+ is
+ (if Aux <= AUX_USBC4
+ then Registers.HIP_INDEX_REG0
+ else Registers.HIP_INDEX_REG1);
+
+ function HIP_INDEX_VAL (Aux : AUX_USBC_Domain; Val : Word32) return Word32
+ is
+ (Val * 2 ** (8 * (AUX_USBC_Index (Aux) mod 4)));
+
+ DKL_CMN_UC_DW_27 : constant array (USBC_Port) of Registers.Registers_Index :=
+ (DDI_TC1 => Registers.DKL_CMN_UC_DW_27_1,
+ DDI_TC2 => Registers.DKL_CMN_UC_DW_27_2,
+ DDI_TC3 => Registers.DKL_CMN_UC_DW_27_3,
+ DDI_TC4 => Registers.DKL_CMN_UC_DW_27_4,
+ DDI_TC5 => Registers.DKL_CMN_UC_DW_27_5,
+ DDI_TC6 => Registers.DKL_CMN_UC_DW_27_6);
+
+ ----------------------------------------------------------------------------
+
+ AUX_CTL_Regs : constant array (USBC_Port) of Registers.Registers_Index :=
+ (DDI_TC1 => Registers.DDI_AUX_CTL_USBC1,
+ DDI_TC2 => Registers.DDI_AUX_CTL_USBC2,
+ DDI_TC3 => Registers.DDI_AUX_CTL_USBC3,
+ DDI_TC4 => Registers.DDI_AUX_CTL_USBC4,
+ DDI_TC5 => Registers.DDI_AUX_CTL_USBC5,
+ DDI_TC6 => Registers.DDI_AUX_CTL_USBC6);
+
+ ----------------------------------------------------------------------------
+
+ procedure Pre_PD_On (PD : in Power_Domain; Success : out Boolean)
+ is
+ DP_AUX_CH_CTL_TBT_IO : constant := 1 * 2 ** 11;
+ begin
+ if PD in AUX_USBC_Domain then
+ -- Disable TBT IO mode for AUX
+ Registers.Unset_Mask
+ (Register => AUX_CTL_Regs (To_GPU_Port (PD)),
+ Mask => DP_AUX_CH_CTL_TBT_IO);
+ Connectors.TC.Ownership.Claimed (To_GPU_Port (PD), Success);
+ elsif PD = PW1 then
+ Registers.Wait_Set_Mask
+ (Register => Registers.FUSE_STATUS,
+ Mask => FUSE_STATUS_PG0_DIST_STATUS,
+ Success => Success);
+ else
+ Success := True;
+ end if;
+ end Pre_PD_On;
+
+ procedure Post_PD_On (PD : Power_Domain)
+ is
+ DKL_CMN_UC_DW_27_UC_HEALTH : constant := 1 * 2 ** 15;
+ begin
+ if PD in PW_Domain then
+ Registers.Wait_Set_Mask
+ (Register => Registers.FUSE_STATUS,
+ Mask => FUSE_STATUS_PGx_DIST_STATUS (PD),
+ TOut_MS => 1);
+ elsif PD in AUX_USBC_Domain then
+ Registers.Write (HIP_INDEX_REG (PD), HIP_INDEX_VAL (PD, 2));
+ Registers.Wait_Set_Mask
+ (Register => DKL_CMN_UC_DW_27 (To_GPU_Port (PD)),
+ Mask => DKL_CMN_UC_DW_27_UC_HEALTH,
+ TOut_MS => 1);
+ end if;
+ end Post_PD_On;
+
+ procedure Pre_PD_Off (PD : Power_Domain) is
+ begin
+ if PD in DDI_USBC_Domain then
+ -- Could be moved to a higher level, but right now it's
+ -- convenient to do it here: When requested to turn the
+ -- power off, we know exactly that we don't want to use
+ -- the port (anymore).
+ Connectors.TC.Ownership.Disconnect (To_GPU_Port (PD));
+ end if;
+ end Pre_PD_Off;
+
+ procedure PD_On (PD : Power_Domain)
+ is
+ Ctl1, Ctl2 : Word32;
+ PD_Type : constant Domain_Types := Domain_Type (PD);
+ Success : Boolean;
+ begin
+ Registers.Read (PWR_CTL_BIOS (PD_Type), Ctl1);
+ Registers.Read (PWR_CTL_DRIVER (PD_Type), Ctl2);
+
+ if ((Ctl1 or Ctl2) and Power_Request_Mask (PD)) = 0 then
+ Registers.Wait_Unset_Mask
+ (Register => PWR_CTL_DRIVER (PD_Type),
+ Mask => Power_State_Mask (PD),
+ TOut_MS => 1);
+ end if;
+
+ if (Ctl2 and Power_Request_Mask (PD)) = 0 then
+ Pre_PD_On (PD, Success);
+ if not Success then
+ pragma Debug (Debug.Put_Line ("Connection flow failed!"));
+ return;
+ end if;
+
+ Registers.Set_Mask (PWR_CTL_DRIVER (PD_Type), Power_Request_Mask (PD));
+
+ Registers.Wait_Set_Mask
+ (Register => PWR_CTL_DRIVER (PD_Type),
+ Mask => Power_State_Mask (PD),
+ TOut_MS => 1,
+ Success => Success);
+ pragma Debug (not Success, Debug.Put_Line ("Failed to enable power domain!"));
+
+ if Success then
+ Post_PD_On (PD);
+ end if;
+ end if;
+ end PD_On;
+
+ procedure PD_Off (PD : Power_Domain)
+ is
+ Ctl1, Ctl2 : Word32;
+ PD_Type : constant Domain_Types := Domain_Type (PD);
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ Registers.Read (PWR_CTL_BIOS (PD_Type), Ctl1);
+ Registers.Read (PWR_CTL_DRIVER (PD_Type), Ctl2);
+
+ if ((Ctl1 or Ctl2) and Power_Request_Mask (PD)) /= 0 then
+ Registers.Wait_Set_Mask
+ (Register => PWR_CTL_DRIVER (PD_Type),
+ Mask => Power_State_Mask (PD),
+ TOut_MS => 1);
+
+ Pre_PD_Off (PD);
+
+ Registers.Unset_Mask (PWR_CTL_DRIVER (PD_Type), Power_Request_Mask (PD));
+ Registers.Unset_Mask (PWR_CTL_BIOS (PD_Type), Power_Request_Mask (PD));
+ end if;
+ end PD_Off;
+
+ ----------------------------------------------------------------------------
+
+ function Need_PD (PD : Dynamic_Domain; Configs : Pipe_Configs) return Boolean
+ is
+ function Any_Port_Is (Port : GPU_Port) return Boolean is
+ (for some Pipe in Pipe_Index =>
+ Configs (Pipe).Port /= Disabled and then
+ Config_Helpers.To_GPU_Port (Pipe, Configs (Pipe).Port) = Port);
+ begin
+ return
+ (case PD is
+ when Dynamic_Well'Range => Need_PW (PD, Configs),
+ when Port_Domain'Range => Any_Port_Is (To_GPU_Port (PD)));
+ end Need_PD;
+
+ ----------------------------------------------------------------------------
+
+ procedure Power_Set_To (Configs : Pipe_Configs) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ for PD in reverse Dynamic_Domain loop
+ if not Need_PD (PD, Configs) then
+ PD_Off (PD);
+ end if;
+ end loop;
+
+ for PD in Dynamic_Domain loop
+ if Need_PD (PD, Configs) then
+ PD_On (PD);
+ end if;
+ end loop;
+ end Power_Set_To;
+
+ procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ -- Power wells only, Aux/DDI domains are enabled later on explicit request.
+ for PW in Dynamic_Well loop
+ if not Need_PW (PW, Old_Configs) and Need_PW (PW, New_Configs) then
+ PD_On (PW);
+ end if;
+ end loop;
+ end Power_Up;
+
+ procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs)
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ for PD in reverse Dynamic_Domain loop
+ if (Need_PD (PD, Old_Configs) or Need_PD (PD, Tmp_Configs)) and
+ not Need_PD (PD, New_Configs)
+ then
+ PD_Off (PD);
+ end if;
+ end loop;
+ end Power_Down;
+
+ procedure All_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ for PD in reverse Power_Domain loop
+ PD_Off (PD);
+ end loop;
+ end All_Off;
+
+end HW.GFX.GMA.Power_Domains_Common;
diff --git a/common/tigerlake/hw-gfx-gma-power_domains_common.ads b/common/tigerlake/hw-gfx-gma-power_domains_common.ads
new file mode 100644
index 0000000..c46bf43
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-power_domains_common.ads
@@ -0,0 +1,29 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA.Registers;
+
+with HW.GFX.GMA.Power_Domains;
+use HW.GFX.GMA.Power_Domains;
+
+private package HW.GFX.GMA.Power_Domains_Common is
+
+ procedure PD_On (PD : Power_Domain);
+
+ procedure Power_Set_To (Configs : Pipe_Configs);
+ procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs);
+ procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs);
+ procedure All_Off;
+
+end HW.GFX.GMA.Power_Domains_Common;
diff --git a/common/tigerlake/tgl/hw-gfx-gma-power_domains.adb b/common/tigerlake/tgl/hw-gfx-gma-power_domains.adb
new file mode 100644
index 0000000..f508de2
--- /dev/null
+++ b/common/tigerlake/tgl/hw-gfx-gma-power_domains.adb
@@ -0,0 +1,93 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with GNAT.Source_Info;
+with HW.Debug;
+with HW.GFX.GMA.Config_Helpers;
+with HW.GFX.GMA.Connectors.TC.Ownership;
+with HW.GFX.GMA.Power_Domains_Common;
+use HW.GFX.GMA.Power_Domains_Common;
+
+package body HW.GFX.GMA.Power_Domains is
+
+ function Need_PW (PW : Dynamic_Well; Configs : Pipe_Configs) return Boolean
+ is
+ function Any_TC_Port return Boolean is
+ (for some Pipe in Pipe_Index =>
+ Configs (Pipe).Port /= Disabled and then
+ Config_Helpers.To_GPU_Port (Pipe, Configs (Pipe).Port) in USBC_Port);
+
+ function Any_Pipe_From (First : Pipe_Index) return Boolean is
+ (for some Pipe in First .. Pipe_Index'Last => Configs (Pipe).Port /= Disabled);
+
+ function VGA return Boolean is
+ (Configs (Primary).Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET);
+ begin
+ case PW is
+ when PW2 | PW3 =>
+ return Any_Pipe_From (Secondary) or Any_TC_Port or VGA;
+ when PW4 =>
+ return Any_Pipe_From (Tertiary);
+ when PW5 =>
+ return False; -- Fourth pipe not supported yet.
+ end case;
+ end Need_PW;
+
+ ----------------------------------------------------------------------------
+
+ procedure Power_Up (Port : Active_Port_Type; Success : out Boolean)
+ is
+ GPU_Port : constant GMA.GPU_Port :=
+ Config_Helpers.To_GPU_Port (Pipe_Index'First, Port);
+
+ procedure On (Aux : AUX_Domain; DDI : DDI_Domain) is
+ begin
+ PD_On (PW1);
+ if GPU_Port in USBC_Port then
+ PD_On (PW2);
+ PD_On (PW3);
+ end if;
+ PD_On (DDI);
+
+ if GPU_Port in USBC_Port then
+ Connectors.TC.Ownership.Claim
+ (Port => GPU_Port,
+ DP_Alt => Port in Physical_USBC_Ports,
+ Success => Success);
+ if not Success then
+ return;
+ end if;
+ end if;
+ PD_On (Aux);
+
+ Success := True;
+ end On;
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ case GPU_Port is
+ when GMA.DIGI_A => On (AUX_A, DDI_A);
+ when GMA.DIGI_B => On (AUX_B, DDI_B);
+ when GMA.DIGI_C => On (AUX_C, DDI_C);
+ when GMA.DDI_TC1 => On (AUX_USBC1, DDI_USBC1);
+ when GMA.DDI_TC2 => On (AUX_USBC2, DDI_USBC2);
+ when GMA.DDI_TC3 => On (AUX_USBC3, DDI_USBC3);
+ when GMA.DDI_TC4 => On (AUX_USBC4, DDI_USBC4);
+ when GMA.DDI_TC5 => On (AUX_USBC5, DDI_USBC5);
+ when GMA.DDI_TC6 => On (AUX_USBC6, DDI_USBC6);
+ when others => Success := True;
+ end case;
+ end Power_Up;
+
+end HW.GFX.GMA.Power_Domains;
diff --git a/common/tigerlake/tgl/hw-gfx-gma-power_domains.ads b/common/tigerlake/tgl/hw-gfx-gma-power_domains.ads
new file mode 100644
index 0000000..bcedb59
--- /dev/null
+++ b/common/tigerlake/tgl/hw-gfx-gma-power_domains.ads
@@ -0,0 +1,68 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+private package HW.GFX.GMA.Power_Domains is
+
+ type Power_Domain is
+ (PW1, PW2, PW3, PW4, PW5,
+ DDI_A, DDI_B, DDI_C,
+ DDI_USBC1, DDI_USBC2, DDI_USBC3, DDI_USBC4, DDI_USBC5, DDI_USBC6,
+ AUX_A, AUX_B, AUX_C,
+ AUX_USBC1, AUX_USBC2, AUX_USBC3, AUX_USBC4, AUX_USBC5, AUX_USBC6);
+ subtype Dynamic_Domain is Power_Domain range PW2 .. Power_Domain'Last;
+ subtype PW_Domain is Power_Domain range PW1 .. PW5;
+ subtype Dynamic_Well is Power_Domain range PW2 .. PW_Domain'Last;
+ subtype Port_Domain is Power_Domain range DDI_A .. AUX_USBC6;
+ subtype DDI_Domain is Power_Domain range DDI_A .. DDI_USBC6;
+ subtype DDI_USBC_Domain is Power_Domain range DDI_USBC1 .. DDI_USBC6;
+ subtype AUX_Domain is Power_Domain range AUX_A .. AUX_USBC6;
+ subtype AUX_USBC_Domain is Power_Domain range AUX_USBC1 .. AUX_USBC6;
+
+ ----------------------------------------------------------------------------
+
+ FUSE_STATUS_PGx_DIST_STATUS : constant array (PW_Domain) of Word32 :=
+ (PW1 => 1 * 2 ** 26,
+ PW2 => 1 * 2 ** 25,
+ PW3 => 1 * 2 ** 24,
+ PW4 => 1 * 2 ** 23,
+ PW5 => 1 * 2 ** 22);
+
+ ----------------------------------------------------------------------------
+
+ function PW_State_Mask (PW : PW_Domain) return Word32
+ is
+ (1 * 2 ** (2 * (PW_Domain'Pos (PW) - PW_Domain'Pos (PW_Domain'First))));
+
+ ----------------------------------------------------------------------------
+
+ function To_GPU_Port (PD : Port_Domain) return GPU_Port
+ is
+ (case PD is
+ when DDI_A | AUX_A => DIGI_A,
+ when DDI_B | AUX_B => DIGI_B,
+ when DDI_C | AUX_C => DIGI_C,
+ when DDI_USBC1 | AUX_USBC1 => DDI_TC1,
+ when DDI_USBC2 | AUX_USBC2 => DDI_TC2,
+ when DDI_USBC3 | AUX_USBC3 => DDI_TC3,
+ when DDI_USBC4 | AUX_USBC4 => DDI_TC4,
+ when DDI_USBC5 | AUX_USBC5 => DDI_TC5,
+ when DDI_USBC6 | AUX_USBC6 => DDI_TC6);
+
+ ----------------------------------------------------------------------------
+
+ function Need_PW (PW : Dynamic_Well; Configs : Pipe_Configs) return Boolean;
+
+ procedure Power_Up (Port : Active_Port_Type; Success : out Boolean);
+
+end HW.GFX.GMA.Power_Domains;