gma: Add config plus stubs for Broxton SoC
Current plan is to support all DDI outputs of Apollo Lake. This
includes one eDP (DDI A) and two fully fledged DDIs (B, C) that can
be either configured to DP 1.2 or HDMI 1.4. MIPI/DSI outputs won't
be supported for now.
Since there doesn't exist any public documentation, the code will be
solely based on analysis of Linux' i915 driver.
Everything is a stub. In the existing code, at least DDI configu-
ration will also have to be adapted.
v2: Escape hash characters in config file
Change-Id: I4a79d4531d238049ba00ab4f03e270e6b58f81ab
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/18421
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/common/Makefile.inc b/common/Makefile.inc
index 0583143..0f34127 100644
--- a/common/Makefile.inc
+++ b/common/Makefile.inc
@@ -66,6 +66,8 @@
subdirs-y += ironlake
else ifneq ($(filter Haswell Broadwell,$(CONFIG_GFX_GMA_CPU)),)
subdirs-y += haswell_shared haswell
-else
+else ifneq ($(filter Broxton,$(CONFIG_GFX_GMA_CPU)),)
+subdirs-y += haswell_shared broxton
+else ifneq ($(filter Skylake,$(CONFIG_GFX_GMA_CPU)),)
subdirs-y += haswell_shared skylake
endif
diff --git a/common/broxton/Makefile.inc b/common/broxton/Makefile.inc
new file mode 100644
index 0000000..247fca1
--- /dev/null
+++ b/common/broxton/Makefile.inc
@@ -0,0 +1,4 @@
+gfxinit-y += hw-gfx-gma-plls.adb
+gfxinit-y += hw-gfx-gma-plls.ads
+gfxinit-y += hw-gfx-gma-power_and_clocks.ads
+gfxinit-y += hw-gfx-gma-spll.ads
diff --git a/common/broxton/hw-gfx-gma-plls.adb b/common/broxton/hw-gfx-gma-plls.adb
new file mode 100644
index 0000000..a2e26e4
--- /dev/null
+++ b/common/broxton/hw-gfx-gma-plls.adb
@@ -0,0 +1,58 @@
+--
+-- Copyright (C) 2017 secunet Security Networks AG
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+package body HW.GFX.GMA.PLLs
+with
+ Refined_State => (State => null)
+is
+
+ procedure Alloc
+ (Port_Cfg : in Port_Config;
+ PLL : out T;
+ Success : out Boolean)
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ case Port_Cfg.Port is
+ when DIGI_A => PLL := DPLL_A;
+ when DIGI_B => PLL := DPLL_B;
+ when DIGI_C => PLL := DPLL_C;
+ when others => PLL := Invalid_PLL;
+ end case;
+
+ Success := PLL /= Invalid_PLL;
+ end Alloc;
+
+ procedure Free (PLL : T) is
+ begin
+ null; -- FIXME
+ end Free;
+
+ procedure All_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ null; -- FIXME
+ end All_Off;
+
+ function Register_Value (PLL : T) return Word32 is
+ begin
+ return 0; -- FIXME
+ end Register_Value;
+
+end HW.GFX.GMA.PLLs;
diff --git a/common/broxton/hw-gfx-gma-plls.ads b/common/broxton/hw-gfx-gma-plls.ads
new file mode 100644
index 0000000..195b2f3
--- /dev/null
+++ b/common/broxton/hw-gfx-gma-plls.ads
@@ -0,0 +1,46 @@
+--
+-- Copyright (C) 2017 secunet Security Networks AG
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+private package HW.GFX.GMA.PLLs
+with
+ Abstract_State => (State with Part_Of => GMA.State)
+is
+
+ -- Broxton DDI PHY PLLs are tied to the port.
+ -- So the allocation will be a stub.
+
+ -- XXX: Types should be private (but that triggers a bug in SPARK GPL 2016)
+ type T is (Invalid_PLL, DPLL_A, DPLL_B, DPLL_C);
+ Invalid : constant T := Invalid_PLL;
+
+ procedure Initialize is null
+ with
+ Global => (Output => State);
+
+ procedure Alloc
+ (Port_Cfg : in Port_Config;
+ PLL : out T;
+ Success : out Boolean);
+
+ pragma Warnings (GNATprove, Off, "subprogram ""*"" has no effect");
+ procedure Free (PLL : T);
+
+ procedure All_Off;
+ pragma Warnings (GNATprove, On, "subprogram ""*"" has no effect");
+
+ pragma Warnings (GNATprove, Off, "unused variable ""PLL""");
+ function Register_Value (PLL : T) return Word32;
+ pragma Warnings (GNATprove, On, "unused variable ""PLL""");
+
+end HW.GFX.GMA.PLLs;
diff --git a/common/broxton/hw-gfx-gma-power_and_clocks.ads b/common/broxton/hw-gfx-gma-power_and_clocks.ads
new file mode 100644
index 0000000..253d537
--- /dev/null
+++ b/common/broxton/hw-gfx-gma-power_and_clocks.ads
@@ -0,0 +1,26 @@
+--
+-- Copyright (C) 2016-2017 secunet Security Networks AG
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+private package HW.GFX.GMA.Power_And_Clocks is
+
+ procedure Pre_All_Off is null;
+ procedure Post_All_Off is null;
+
+ procedure Initialize is null;
+
+ procedure Power_Set_To (Configs : Pipe_Configs) is null;
+ procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs) is null;
+ procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs) is null;
+
+end HW.GFX.GMA.Power_And_Clocks;
diff --git a/common/broxton/hw-gfx-gma-spll.ads b/common/broxton/hw-gfx-gma-spll.ads
new file mode 100644
index 0000000..571dde9
--- /dev/null
+++ b/common/broxton/hw-gfx-gma-spll.ads
@@ -0,0 +1,24 @@
+--
+-- Copyright (C) 2016 secunet Security Networks AG
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+package HW.GFX.GMA.SPLL is
+
+ -- Just for a common interface with Haswell's DDI.
+ -- There is no SPLL (no FDI) on Broxton.
+
+ procedure On is null;
+
+ procedure Off is null;
+
+end HW.GFX.GMA.SPLL;
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index 5ad6593..5aac59a 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -46,7 +46,7 @@
Has_Pipe_MSA_Misc : constant Boolean := CPU >= Haswell;
Has_Pipeconf_Misc : constant Boolean := CPU >= Broadwell;
Has_Pipeconf_BPC : constant Boolean := CPU /= Haswell;
- Has_Plane_Control : constant Boolean := CPU >= Skylake;
+ Has_Plane_Control : constant Boolean := CPU >= Broxton;
Has_DSP_Linoff : constant Boolean := CPU <= Ivybridge;
Has_PF_Pipe_Select : constant Boolean := CPU in Ivybridge .. Haswell;
VGA_Plane_Workaround : constant Boolean := CPU = Ivybridge;
@@ -88,7 +88,7 @@
and CPU_Var = Normal)
or CPU >= Skylake;
- Has_Low_Voltage_Swing : constant Boolean := CPU >= Skylake;
+ Has_Low_Voltage_Swing : constant Boolean := CPU >= Broxton;
Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC)
@@ -102,7 +102,7 @@
Has_Per_Pipe_SRD : constant Boolean := CPU >= Broadwell;
- ----- GTT: -----
+ ----- GTT: -------------
Fold_39Bit_GTT_PTE : constant Boolean := CPU <= Haswell;
----------------------------------------------------------------------------
@@ -121,33 +121,40 @@
type Valid_Per_Port is array (Port_Type) of Boolean;
type Valid_Per_GPU is array (CPU_Type) of Valid_Per_Port;
Valid_Port_GPU : Valid_Per_GPU :=
- (Ironlake => Valid_Per_Port'
+ (Ironlake =>
(Disabled => False,
Internal => Config.Internal_Display = LVDS,
others => True),
- Sandybridge => Valid_Per_Port'
+ Sandybridge =>
(Disabled => False,
Internal => Config.Internal_Display = LVDS,
others => True),
- Ivybridge => Valid_Per_Port'
+ Ivybridge =>
(Disabled => False,
Internal => Config.Internal_Display /= None,
others => True),
- Haswell => Valid_Per_Port'
+ Haswell =>
(Disabled => False,
Internal => Config.Internal_Display = DP,
HDMI3 => CPU_Var = Normal,
DP3 => CPU_Var = Normal,
Analog => CPU_Var = Normal,
others => True),
- Broadwell => Valid_Per_Port'
+ Broadwell =>
(Disabled => False,
Internal => Config.Internal_Display = DP,
HDMI3 => CPU_Var = Normal,
DP3 => CPU_Var = Normal,
Analog => CPU_Var = Normal,
others => True),
- Skylake => Valid_Per_Port'
+ Broxton =>
+ (Internal => Config.Internal_Display = DP,
+ DP1 => True,
+ DP2 => True,
+ HDMI1 => True,
+ HDMI2 => True,
+ others => False),
+ Skylake =>
(Disabled => False,
Internal => Config.Internal_Display = DP,
Analog => False,
@@ -173,7 +180,7 @@
when Broadwell => FDI_Per_Port'
(Analog => CPU_Var = Normal,
others => False),
- when Skylake => FDI_Per_Port'
+ when others => FDI_Per_Port'
(others => False));
type FDI_Lanes_Per_Port is array (GPU_Port) of DP_Lane_Count;
@@ -200,6 +207,7 @@
Broadwell => 450_000_000,
when Sandybridge |
Ivybridge => 400_000_000,
+ when Broxton => 288_000_000,
when Skylake => 337_500_000);
Default_RawClk_Freq : constant Frequency_Type :=
@@ -212,6 +220,7 @@
125_000_000
else
24_000_000),
+ when Broxton => Frequency_Type'First, -- none needed
when Skylake => 24_000_000);
----------------------------------------------------------------------------
@@ -234,6 +243,7 @@
----------------------------------------------------------------------------
+ -- FIXME: Unknown for Broxton, Linux' i915 contains a fixme too :-D
HDMI_Max_Clock_24bpp : constant Frequency_Type :=
(if CPU >= Haswell then 300_000_000 else 225_000_000);
diff --git a/common/hw-gfx-gma-pch.ads b/common/hw-gfx-gma-pch.ads
index 6bfff46..619ccb6 100644
--- a/common/hw-gfx-gma-pch.ads
+++ b/common/hw-gfx-gma-pch.ads
@@ -26,13 +26,13 @@
(case Config.CPU is
when Ironlake => 30,
when Sandybridge | Ivybridge => 29,
- when Haswell | Broadwell | Skylake => 0);
+ when Haswell .. Skylake => 0);
PCH_TRANSCODER_SELECT_MASK : constant :=
(case Config.CPU is
when Ironlake => 1 * 2 ** 30,
when Sandybridge | Ivybridge => 3 * 2 ** 29,
- when Haswell | Broadwell | Skylake => 0);
+ when Haswell .. Skylake => 0);
type PCH_TRANSCODER_SELECT_Array is array (FDI_Port_Type) of Word32;
PCH_TRANSCODER_SELECT : constant PCH_TRANSCODER_SELECT_Array :=
diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb
index 0dcad80..77ce2aa 100644
--- a/common/hw-gfx-gma.adb
+++ b/common/hw-gfx-gma.adb
@@ -320,6 +320,7 @@
end case;
Success :=
(case Config.CPU is
+ when Broxton => Audio_VID_DID = 16#8086_280a#,
when Skylake => Audio_VID_DID = 16#8086_2809#,
when Broadwell => Audio_VID_DID = 16#8086_2808#,
when Haswell => Audio_VID_DID = 16#8086_2807#,
diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads
index 45f57f4..8d51960 100644
--- a/common/hw-gfx-gma.ads
+++ b/common/hw-gfx-gma.ads
@@ -33,6 +33,7 @@
Ivybridge,
Haswell,
Broadwell,
+ Broxton,
Skylake);
type CPU_Variant is (Normal, ULT);
diff --git a/configs/broxton b/configs/broxton
new file mode 100644
index 0000000..b5f1f9a
--- /dev/null
+++ b/configs/broxton
@@ -0,0 +1,5 @@
+CONFIG_GFX_GMA_CPU = Broxton
+CONFIG_GFX_GMA_CPU_VARIANT = Normal # N/A
+CONFIG_GFX_GMA_INTERNAL_PORT = DP
+CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC # N/A
+CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\#