gma ilk: Handle CDClk and calculate dot-clock limits
This one is easy, the CDClk always runs at the same fixed rate. We
only have to limit dot clocks to 90% of CDClk.
Change-Id: I475a276d050f5a109b44c02ee250c9f4a9ebe863
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/35716
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
index a7b1035..42aabbd 100644
--- a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
+++ b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
@@ -51,7 +51,18 @@
Time.U_Delay (20); -- DMI latency
end if;
+ Config.CDClk := Config.Default_CDClk_Freq;
+ Config.Max_CDClk := Config.Default_CDClk_Freq;
Config.Raw_Clock := Config.Default_RawClk_Freq;
end Initialize;
+ procedure Limit_Dotclocks
+ (Configs : in out Pipe_Configs;
+ CDClk_Switch : out Boolean)
+ is
+ begin
+ Config_Helpers.Limit_Dotclocks (Configs, Config.CDClk * 90 / 100);
+ CDClk_Switch := False;
+ end Limit_Dotclocks;
+
end HW.GFX.GMA.Power_And_Clocks_Ironlake;