commit 1eb5faa2eeca93b911af51bdbea854d286bfab81
author Nico Huber <nico.h@gmx.de> Sun Sep 29 00:35:55 2019 +0200
committer Nico Huber <nico.h@gmx.de> Fri Oct 18 12:20:15 2019 +0000
tree ec391081c9fc898d7874a4b6d2acc0b4936fe3ba
parent b47a5c479358a4cecf2589295b37954edd1e36e5

gma ilk: Handle CDClk and calculate dot-clock limits

This one is easy, the CDClk always runs at the same fixed rate. We
only have to limit dot clocks to 90% of CDClk.

Change-Id: I475a276d050f5a109b44c02ee250c9f4a9ebe863
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/35716
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb

diff --git a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
index a7b1035..42aabbd 100644
--- a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
+++ b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
@@ -51,7 +51,18 @@
          Time.U_Delay (20);   -- DMI latency
       end if;
 
+      Config.CDClk := Config.Default_CDClk_Freq;
+      Config.Max_CDClk := Config.Default_CDClk_Freq;
       Config.Raw_Clock := Config.Default_RawClk_Freq;
    end Initialize;
 
+   procedure Limit_Dotclocks
+     (Configs        : in out Pipe_Configs;
+      CDClk_Switch   :    out Boolean)
+   is
+   begin
+      Config_Helpers.Limit_Dotclocks (Configs, Config.CDClk * 90 / 100);
+      CDClk_Switch := False;
+   end Limit_Dotclocks;
+
 end HW.GFX.GMA.Power_And_Clocks_Ironlake;

common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.ads

diff --git a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.ads b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.ads
index fc58d75..00e83df 100644
--- a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.ads
+++ b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.ads
@@ -12,10 +12,22 @@
 -- GNU General Public License for more details.
 --
 
+with HW.GFX.GMA.Config_Helpers;
+
 private package HW.GFX.GMA.Power_And_Clocks_Ironlake is
 
    procedure Initialize;
 
+   procedure Limit_Dotclocks
+     (Configs        : in out Pipe_Configs;
+      CDClk_Switch   :    out Boolean)
+   with
+      Post =>
+         not CDClk_Switch and
+         Config_Helpers.Stable_FB (Configs'Old, Configs);
+   procedure Update_CDClk (Configs : in out Pipe_Configs) is null;
+   procedure Enable_CDClk is null;
+
    procedure Pre_All_Off is null;
 
    procedure Post_All_Off is null;