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review.sourcearcade.org / flashprog / b6417a68045608cf21ba5e8acb7f97ce746293bc / chipset_enable.c
  1. f8ef5d9 Add support for SIS661 (SIS963) by David Borg · 14 years ago
  2. 2f43616 Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing support by Carl-Daniel Hailfinger · 14 years ago
  3. 5b997c3 Split off programmer.h from flash.h by Carl-Daniel Hailfinger · 14 years ago
  4. 1d3a2fe Convert MMIO accesses of non-internal PCI-based programmers to be endian-agnostic by Carl-Daniel Hailfinger · 14 years ago
  5. b05b9e1 Move SB600 SPI initialization to sb600spi.c by Michael Karcher · 14 years ago
  6. a4448d9 Move Intel SPI initialisation to ichspi.c by Michael Karcher · 14 years ago
  7. ab92277 Fix out-of-bounds ICH FREG permission printing by Carl-Daniel Hailfinger · 14 years ago
  8. 2b6dcb3 Unify programmer parameter extraction by Carl-Daniel Hailfinger · 14 years ago
  9. 744132a Various places in the flashrom source feature custom parameter extraction from programmer_param by Carl-Daniel Hailfinger · 14 years ago
  10. ad3cc55 Kill global variables, constants and functions if local scope suffices by Carl-Daniel Hailfinger · 14 years ago
  11. f93b36a ICH9/10: display FRAP/FREGx access controls by Joshua Roys · 14 years ago
  12. dcef67e Kill unneeded #include wherever possible by Carl-Daniel Hailfinger · 15 years ago
  13. 7f9922d Fill in buses_supported for remaining Intel chipsets (ICH0-ICH5, Poulsbo) by Carl-Daniel Hailfinger · 15 years ago
  14. 89bed6d VIA: disable byte merging by Michael Karcher · 15 years ago
  15. 5f31ebe Board-enable for MS-7025 (K8N Neo2 Platinum) by Michael Karcher · 15 years ago
  16. 831e8f4 Remove unneeded #include statements completely by Carl-Daniel Hailfinger · 15 years ago
  17. 80f3d05 ichspi: try harder to conform to address restrictions by Carl-Daniel Hailfinger · 15 years ago
  18. cceafa2 Handle the following architectures in generic flashrom code by Carl-Daniel Hailfinger · 15 years ago
  19. f469c27 Print found PCI IDs during chipset detection by Carl-Daniel Hailfinger · 15 years ago
  20. 33d7b6a Disable probing for one variant of MCP55 to enable Tyan S2915 by Carl-Daniel Hailfinger · 15 years ago
  21. 316a29f Convert various prints to use msg_p* and msg_g* respectively by Sean Nelson · 15 years ago
  22. cfa674f Rename identifiers called 'byte' by Michael Karcher · 15 years ago
  23. ce5fad0 Refactor MCP SPI detection by Carl-Daniel Hailfinger · 15 years ago
  24. ea3b1b4 Add SPI mode diagnostics for all post-MCP55 (nForce 5) chipsets from Nvidia by Carl-Daniel Hailfinger · 15 years ago
  25. db7c153 Add Intel NM10 chipset enable by David Hendricks · 15 years ago
  26. 4e2fb0e Don't use "byte" as identifier by Michael Karcher · 15 years ago
  27. 9cce2f5 Chipset: Fix sis5x0 register write verification by Luc Verhaegen · 15 years ago
  28. 9678539 Fix Intel FWH decode size by Michael Karcher · 15 years ago
  29. cd8404d Add VIA VT8233A identification, mark as tested by Raúl Soriano · 15 years ago
  30. 73d2119 Chipset/Board: vt8237: Set All mem cycles to LPC in chipset enable by Luc Verhaegen · 15 years ago
  31. e498410 Chipset: Add support for Intel Poulsbo chipset by Adam Jurkowski · 15 years ago
  32. 2a9e245 Use the maximum decode size infrastructure by Carl-Daniel Hailfinger · 15 years ago
  33. 66ef4e5 Internal (onboard) programming was the only feature which could not be disabled by Carl-Daniel Hailfinger · 15 years ago
  34. 9892ca6 Chipset: remove sis630 chipset enable for sis540 by Luc Verhaegen · 15 years ago
  35. a661e15 Intel PIIX* chipsets only support parallel flash (no LPC/FWH/SPI) by Maciej Pijanka · 15 years ago
  36. 797a834 Add support for Intel 3400 series / 5 series chipset by Carl-Daniel Hailfinger · 15 years ago
  37. 6a0269e Mark Elitegroup K7S5A as supported by Carl-Daniel Hailfinger · 15 years ago
  38. 9f46cfc Add support for every single SiS chipset out there by Carl-Daniel Hailfinger · 15 years ago
  39. 115d390 Add infrastructure to check the maximum supported flash size of chipsets and mainboards by Carl-Daniel Hailfinger · 15 years ago
  40. aad7e67 Mark NVIDIA Nforce4/MCP04 as tested by Luc Verhaegen · 15 years ago
  41. cd00e88 Chipset support for the nVidia nForce 4 by Luc Verhaegen · 15 years ago
  42. 3e0774d Add chipset support for VIA VT82C596 by adding a PCI ID by Uwe Hermann · 15 years ago
  43. e715c7b Enable flashrom on Wyse Winterm S50 by Nils Jacobs · 15 years ago
  44. 174962d Use correct name for SB700/SB710/SB750 instead of calling them SB700 by Carl-Daniel Hailfinger · 15 years ago
  45. 95baaad Add support for ICH9 engineering sample by Carl-Daniel Hailfinger · 15 years ago
  46. 4449868 Allow the user to override FWH IDSEL on ICH6 and later by Carl-Daniel Hailfinger · 15 years ago
  47. 8fa6481 Fix up MSR handling to support more OSes than Linux. by Stefan Reinauer · 15 years ago
  48. 630c79d Make debug messages printf_debug(). by Stefan Reinauer · 15 years ago
  49. 4c7ea38 Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode settings to the debug output by Carl-Daniel Hailfinger · 15 years ago
  50. be72681 Remove unnecessary #include files by Carl-Daniel Hailfinger · 15 years ago
  51. f8555e2 This is a workaround for a bug in SB600 and SB700 by Carl-Daniel Hailfinger · 15 years ago
  52. 1432a60 Random minor flashrom fixes by Uwe Hermann · 16 years ago
  53. 9899cad Print the bus type(s) of both chipset and chip in the flashrom output by Uwe Hermann · 16 years ago
  54. e6abef0 Chipset enable for VIA VT8233 by Mateusz Murawski · 16 years ago
  55. ba290d1 Move all printing code to print.c by Uwe Hermann · 16 years ago
  56. 4e58790 List the size (in KB) and type of supported flash chips in 'flashrom -L' by Uwe Hermann · 16 years ago
  57. 8dfea83 The VIA VX800 chipset works with the VT8237S code after adding an entry for the VX800 PCI ID by Arjan Koers · 16 years ago
  58. e9d04d4 Mark 3COM "3C905B: Cyclone 10/100/BNC" as fully tested by Uwe Hermann · 16 years ago
  59. b22918c Only probe for chips with compatible bus protocols by Carl-Daniel Hailfinger · 16 years ago
  60. 1dfe0ff Add bus type annotation to struct flashchips by Carl-Daniel Hailfinger · 16 years ago
  61. 90e8e61 Add NForce2 chipset enable by Luc Verhaegen · 16 years ago
  62. e8ba538 A bunch of output beautifications and improvements, as well as doc fixes by Uwe Hermann · 16 years ago
  63. 78185dc Use accessor functions for MMIO by Carl-Daniel Hailfinger · 16 years ago
  64. 05fab75 List all boards which are by Uwe Hermann · 16 years ago
  65. 2cac686 Drop unused/duplicated #includes and some dead code by Uwe Hermann · 16 years ago
  66. 9862251 Uwe tested the recent SB600 SPI commit and notified me of one unexpected problem by Carl-Daniel Hailfinger · 16 years ago
  67. dbfa029 Create a SB600 SPI detection heuristic by Carl-Daniel Hailfinger · 16 years ago
  68. 4179d29 Make chipset list alphabetically ordered as the other lists by Uwe Hermann · 16 years ago
  69. b003991 Store and display chipset test status (not only chip status) by Uwe Hermann · 16 years ago
  70. 19997ae Clarify error message in enable_flash_sb600() a little by Peter Stuge · 16 years ago
  71. 9bb88ac Revert r466 because of inverted logic by Carl-Daniel Hailfinger · 16 years ago
  72. a66ceba Cleanup redundant condition and clarify message a little by Peter Stuge · 16 years ago
  73. 7725fa8 Touch up some error messages in enable_flash_cs5536() by Peter Stuge · 16 years ago
  74. f6e3efb Clean up the SB400 chipset enable code by Carl-Daniel Hailfinger · 16 years ago
  75. 41d6bd9 Rewrite the SB600 chipset enable function by Carl-Daniel Hailfinger · 16 years ago
  76. b452a91 Here is a fix for chipset_enable.c when there is not /dev/cpu by Bertrand Jacquin · 16 years ago
  77. 284a600 Force enabling SPI mode for SB600 is a bad idea and leads to hangs by Zheng Bao · 16 years ago
  78. 7b2969b Some coding style and consistency fixes by Uwe Hermann · 16 years ago
  79. 0c2029f Following patch fixes VIA SPI (VT8237S) by Rudolf Marek · 16 years ago
  80. 20ed5d1 Add VT8237A PCI ID by Peter Stuge · 16 years ago
  81. 0593f21 Abstract mmap() in physmap.c and only open /dev/mem on the first physmap() call by Stefan Reinauer · 16 years ago
  82. ccf8c6c Check all mmap() calls and print helpful Linux error message by Peter Stuge · 16 years ago
  83. 37179b8 Fix ICH9 locking register address and add important debug output by FENG yu ning · 16 years ago
  84. b5d677b Add AMD-768 chipset support by Sven Schnelle · 16 years ago
  85. ed2352b Add i631x LPC support by Sven Schnelle · 16 years ago
  86. e8a3e4c Initialize ICH SPI opcodes also for ICH9 and later by Peter Stuge · 16 years ago
  87. f041e9b Various ichspi.c refinements by FENG yu ning · 16 years ago
  88. c05a295 Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI configuration is locked down by FENG yu ning · 16 years ago
  89. f63c0dc Add AMD SB700 flash enable by Niels Ole Salscheider · 16 years ago
  90. 9a6d176 Replace #ifdefs for sc520 systems by run time probing by Stefan Reinauer · 16 years ago
  91. a3f04be Add support for the AMD/ATI SB600 southbridge SPI functionality by Jason Wang · 16 years ago
  92. d3b0e39 Dump ICH8/ICH9/ICH10 SPI registers by Carl-Daniel Hailfinger · 16 years ago
  93. b759db2 Enable SPI boot flash support on EP80579, which has the ICH7 register set by Ed Swierk · 16 years ago
  94. c556d32 Add support for the Intel 82371MX (MPIIX) southbridge by Uwe Hermann · 16 years ago
  95. 8720345 Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges by Uwe Hermann · 16 years ago
  96. 190f849 Add support for the VIA VT82C586A/B chipset, improve documentation by Uwe Hermann · 16 years ago
  97. 394131e Coding-style fixes for flashrom, partly indent-aided by Uwe Hermann · 16 years ago
  98. a88daa7 Allow the SiS 620 chipset to detect and read at least 256kb chips by Urja Rannikko · 16 years ago
  99. 3af487d SB600 has four write once LPC ROM protect areas by Marc Jones · 16 years ago
  100. 28ec74b Add ICH10 support by Carl-Daniel Hailfinger · 16 years ago