blob: c1eb64a641a890f6ce43194ad5a11aff212ee82e [file] [log] [blame]
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +03001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <string.h>
18#include "flash.h"
Jacob Garber6c683632019-06-21 15:33:09 -060019#include "chipdrivers.h"
Nico Huberd5185632024-01-05 18:44:41 +010020#include "spi_command.h"
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +030021#include "ene.h"
22#include "edi.h"
23
24static unsigned int edi_read_buffer_length = EDI_READ_BUFFER_LENGTH_DEFAULT;
25
26static const struct ene_chip ene_kb9012 = {
27 .hwversion = ENE_KB9012_HWVERSION,
28 .ediid = ENE_KB9012_EDIID,
29};
30
31static void edi_write_cmd(unsigned char *cmd, unsigned short address, unsigned char data)
32{
33 cmd[0] = EDI_WRITE; /* EDI write command. */
34 cmd[1] = 0x00; /* Address is only 2 bytes. */
35 cmd[2] = (address >> 8) & 0xff; /* Address higher byte. */
36 cmd[3] = (address >> 0) & 0xff; /* Address lower byte. */
37 cmd[4] = data; /* Write data. */
38}
39
40static void edi_read_cmd(unsigned char *cmd, unsigned short address)
41{
42 cmd[0] = EDI_READ; /* EDI read command. */
43 cmd[1] = 0x00; /* Address is only 2 bytes. */
44 cmd[2] = (address >> 8) & 0xff; /* Address higher byte. */
45 cmd[3] = (address >> 0) & 0xff; /* Address lower byte. */
46}
47
48static int edi_write(struct flashctx *flash, unsigned short address, unsigned char data)
49{
50 unsigned char cmd[5];
51 int rc;
52
53 edi_write_cmd(cmd, address, data);
54
55 rc = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
56 if (rc)
57 return -1;
58
59 return 0;
60}
61
62static int edi_read_byte(struct flashctx *flash, unsigned short address, unsigned char *data)
63{
64 unsigned char cmd[4];
65 unsigned char buffer[edi_read_buffer_length];
66 unsigned int index;
67 unsigned int i;
68 int rc;
69
70 edi_read_cmd(cmd, address);
71
72 rc = spi_send_command(flash, sizeof(cmd), sizeof(buffer), cmd, buffer);
73 if (rc)
74 return -1;
75
76 index = 0;
77
78 for (i = 0; i < sizeof(buffer); i++) {
79 index = i;
80
81 if (buffer[i] == EDI_NOT_READY)
82 continue;
83
84 if (buffer[i] == EDI_READY) {
85 if (i == (sizeof(buffer) - 1)) {
86 /*
87 * Buffer size was too small for receiving the value.
88 * This is as good as getting only EDI_NOT_READY.
89 */
90
91 buffer[i] = EDI_NOT_READY;
92 break;
93 }
94
95 *data = buffer[i + 1];
96 return 0;
97 }
98 }
99
100 if (buffer[index] == EDI_NOT_READY)
101 return -EDI_NOT_READY;
102
103 return -1;
104}
105
106static int edi_read(struct flashctx *flash, unsigned short address, unsigned char *data)
107{
108 int rc;
109
110 do {
111 rc = edi_read_byte(flash, address, data);
112 if (rc == -EDI_NOT_READY) {
113 /*
114 * Buffer size is increased, one step at a time,
115 * to hold more data if we only catch EDI_NOT_READY.
116 * Once CS is deasserted, no more data will be sent by the EC,
117 * so we cannot keep reading afterwards and have to start a new
118 * transaction with a longer buffer, to be safe.
119 */
120
121 if (edi_read_buffer_length < EDI_READ_BUFFER_LENGTH_MAX) {
122 msg_pwarn("%s: Retrying read with greater buffer length!\n", __func__);
123 edi_read_buffer_length++;
124 } else {
125 msg_perr("%s: Maximum buffer length reached and data still not ready!\n", __func__);
126 return -1;
127 }
128 } else if (rc < 0) {
129 return -1;
130 }
131 } while (rc == -EDI_NOT_READY);
132
133 return 0;
134}
135
136static int edi_disable(struct flashctx *flash)
137{
138 unsigned char cmd = EDI_DISABLE;
139 int rc;
140
141 rc = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL);
142 if (rc)
143 return -1;
144
145 return 0;
146}
147
148static int edi_chip_probe(struct flashctx *flash, const struct ene_chip *chip)
149{
150 unsigned char hwversion;
151 unsigned char ediid;
152 int rc;
153
154 rc = edi_read(flash, ENE_EC_HWVERSION, &hwversion);
Mike Banon3a826042018-01-15 01:09:16 +0300155 if (rc < 0) {
156 msg_cdbg("%s: reading hwversion failed\n", __func__);
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300157 return 0;
Mike Banon3a826042018-01-15 01:09:16 +0300158 }
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300159
160 rc = edi_read(flash, ENE_EC_EDIID, &ediid);
Mike Banon3a826042018-01-15 01:09:16 +0300161 if (rc < 0) {
162 msg_cdbg("%s: reading ediid failed\n", __func__);
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300163 return 0;
Mike Banon3a826042018-01-15 01:09:16 +0300164 }
165
166 msg_cdbg("%s: hwversion 0x%02x, ediid 0x%02x\n", __func__, hwversion, ediid);
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300167
168 if (chip->hwversion == hwversion && chip->ediid == ediid)
169 return 1;
170
171 return 0;
172}
173
174static int edi_spi_enable(struct flashctx *flash)
175{
176 unsigned char buffer;
177 int rc;
178
179 rc = edi_read(flash, ENE_XBI_EFCFG, &buffer);
180 if (rc < 0)
181 return -1;
182
183 buffer |= ENE_XBI_EFCFG_CMD_WE;
184
185 rc = edi_write(flash, ENE_XBI_EFCFG, buffer);
186 if (rc < 0)
187 return -1;
188
189 return 0;
190}
191
192static int edi_spi_disable(struct flashctx *flash)
193{
194 unsigned char buffer;
195 int rc;
196
197 rc = edi_read(flash, ENE_XBI_EFCFG, &buffer);
198 if (rc < 0)
199 return -1;
200
201 buffer &= ~ENE_XBI_EFCFG_CMD_WE;
202
203 rc = edi_write(flash, ENE_XBI_EFCFG, buffer);
204 if (rc < 0)
205 return -1;
206
207 return 0;
208}
209
210static int edi_spi_busy(struct flashctx *flash)
211{
212 unsigned char buffer;
213 int rc;
214
215 rc = edi_read(flash, ENE_XBI_EFCFG, &buffer);
216 if (rc < 0)
217 return -1;
218
219 return !!(buffer & ENE_XBI_EFCFG_BUSY);
220}
221
222static int edi_spi_address(struct flashctx *flash, unsigned int start, unsigned int address)
223{
224 int rc;
225
226 if ((address == start) || (((address - 1) & 0xff) != (address & 0xff))) {
227 rc = edi_write(flash, ENE_XBI_EFA0, ((address & 0xff) >> 0));
228 if (rc < 0)
229 return -1;
230 }
231
232 if ((address == start) || (((address - 1) & 0xff00) != (address & 0xff00))) {
233 rc = edi_write(flash, ENE_XBI_EFA1, ((address & 0xff00) >> 8));
234 if (rc < 0)
235 return -1;
236 }
237
238 if ((address == start) || (((address - 1) & 0xff0000) != (address & 0xff0000))) {
239 rc = edi_write(flash, ENE_XBI_EFA2, ((address & 0xff0000) >> 16));
240 if (rc < 0)
241 return -1;
242 }
243
244 return 0;
245}
246
247static int edi_8051_reset(struct flashctx *flash)
248{
249 unsigned char buffer;
250 int rc;
251
252 rc = edi_read(flash, ENE_EC_PXCFG, &buffer);
253 if (rc < 0)
254 return -1;
255
256 buffer |= ENE_EC_PXCFG_8051_RESET;
257
258 rc = edi_write(flash, ENE_EC_PXCFG, buffer);
259 if (rc < 0)
260 return -1;
261
262 return 0;
263}
264
265static int edi_8051_execute(struct flashctx *flash)
266{
267 unsigned char buffer;
268 int rc;
269
270 rc = edi_read(flash, ENE_EC_PXCFG, &buffer);
271 if (rc < 0)
272 return -1;
273
274 buffer &= ~ENE_EC_PXCFG_8051_RESET;
275
276 rc = edi_write(flash, ENE_EC_PXCFG, buffer);
277 if (rc < 0)
278 return -1;
279
280 return 0;
281}
282
283int edi_chip_block_erase(struct flashctx *flash, unsigned int page, unsigned int size)
284{
285 unsigned int timeout = 64;
286 int rc;
287
288 if (size != flash->chip->page_size) {
289 msg_perr("%s: Block erase size is not page size!\n", __func__);
290 return -1;
291 }
292
293 rc = edi_spi_enable(flash);
294 if (rc < 0) {
295 msg_perr("%s: Unable to enable SPI!\n", __func__);
296 return -1;
297 }
298
299 rc = edi_spi_address(flash, page, page);
300 if (rc < 0)
301 return -1;
302
303 rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_ERASE);
304 if (rc < 0)
305 return -1;
306
307 while (edi_spi_busy(flash) == 1 && timeout) {
308 programmer_delay(10);
309 timeout--;
310 }
311
312 if (!timeout) {
313 msg_perr("%s: Timed out waiting for SPI not busy!\n", __func__);
314 return -1;
315 }
316
317 rc = edi_spi_disable(flash);
318 if (rc < 0) {
319 msg_perr("%s: Unable to disable SPI!\n", __func__);
320 return -1;
321 }
322
323 return 0;
324}
325
326int edi_chip_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
327{
328 unsigned int address = start;
329 unsigned int pages;
330 unsigned int timeout;
331 unsigned int i, j;
332 int rc;
333
334 if ((start % flash->chip->page_size) != 0) {
335 msg_perr("%s: Start address is not page-aligned!\n", __func__);
336 return -1;
337 }
338
339 if ((len % flash->chip->page_size) != 0) {
340 msg_perr("%s: Length is not page-aligned!\n", __func__);
341 return -1;
342 }
343
344 pages = len / flash->chip->page_size;
345
346 rc = edi_spi_enable(flash);
347 if (rc < 0) {
348 msg_perr("%s: Unable to enable SPI!\n", __func__);
349 return -1;
350 }
351
352 for (i = 0; i < pages; i++) {
353 timeout = 64;
354
355 /* Clear page buffer. */
356 rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_HVPL_CLEAR);
357 if (rc < 0)
358 return -1;
359
360 for (j = 0; j < flash->chip->page_size; j++) {
361 rc = edi_spi_address(flash, start, address);
362 if (rc < 0)
363 return -1;
364
365 rc = edi_write(flash, ENE_XBI_EFDAT, *buf);
366 if (rc < 0)
367 return -1;
368
369 rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_HVPL_LATCH);
370 if (rc < 0)
371 return -1;
372
373 buf++;
374 address++;
375 }
376
377 /* Program page buffer to flash. */
378 rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_PROGRAM);
379 if (rc < 0)
380 return -1;
381
382 while (edi_spi_busy(flash) == 1 && timeout) {
383 programmer_delay(10);
384 timeout--;
385 }
386
387 if (!timeout) {
388 msg_perr("%s: Timed out waiting for SPI not busy!\n", __func__);
389 return -1;
390 }
Richard Hughes842d6782021-01-15 09:48:12 +0000391
392 flashprog_progress_add(flash, flash->chip->page_size);
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300393 }
394
395 rc = edi_spi_disable(flash);
396 if (rc < 0) {
397 msg_perr("%s: Unable to disable SPI!\n", __func__);
398 return -1;
399 }
400
401 return 0;
402}
403
404int edi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
405{
406 unsigned int address = start;
407 unsigned int i;
408 unsigned int timeout;
409 int rc;
410
411 rc = edi_spi_enable(flash);
412 if (rc < 0) {
413 msg_perr("%s: Unable to enable SPI!\n", __func__);
414 return -1;
415 }
416
417 /*
418 * EDI brings such a drastic overhead that there is about no need to
419 * have any delay in between calls. The EDI protocol will handle wait
420 * I/O times on its own anyway.
421 */
422
423 for (i = 0; i < len; i++) {
424 timeout = 64;
425
426 rc = edi_spi_address(flash, start, address);
427 if (rc < 0)
428 return -1;
429
430 rc = edi_write(flash, ENE_XBI_EFCMD, ENE_XBI_EFCMD_READ);
431 if (rc < 0)
432 return -1;
433
434 do {
435 rc = edi_read(flash, ENE_XBI_EFDAT, buf);
436 if (rc == 0)
437 break;
438
439 /* Just in case. */
440 while (edi_spi_busy(flash) == 1 && timeout) {
441 programmer_delay(10);
442 timeout--;
443 }
444
445 if (!timeout) {
446 msg_perr("%s: Timed out waiting for SPI not busy!\n", __func__);
447 return -1;
448 }
449 } while (1);
450
451 buf++;
452 address++;
Richard Hughes842d6782021-01-15 09:48:12 +0000453 flashprog_progress_add(flash, 1);
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300454 }
455
456 rc = edi_spi_disable(flash);
457 if (rc < 0) {
458 msg_perr("%s: Unable to disable SPI!\n", __func__);
459 return -1;
460 }
461
462 return 0;
463}
464
Jacob Garberbeeb8bc2019-06-21 15:24:17 -0600465static int edi_shutdown(void *data)
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300466{
467 struct flashctx *flash;
468 int rc;
469
470 if (data == NULL)
471 return -1;
472
473 flash = (struct flashctx *)data;
474
475 rc = edi_8051_execute(flash);
476 if (rc < 0) {
477 msg_perr("%s: Unable to execute 8051!\n", __func__);
478 return -1;
479 }
480
481 rc = edi_disable(flash);
482 if (rc < 0) {
483 msg_perr("%s: Unable to disable EDI!\n", __func__);
484 return -1;
485 }
486
487 return 0;
488}
489
490int edi_probe_kb9012(struct flashctx *flash)
491{
492 int probe;
493 int rc;
Paul Kocialkowskia590f482018-01-15 01:08:39 +0300494 unsigned char hwversion;
495
496 /*
497 * ENE chips enable EDI by detecting a clock frequency between 1 MHz and
498 * 8 MHz. In many cases, the chip won't be able to both detect the clock
499 * signal and serve the associated request at the same time.
500 *
501 * Thus, a dummy read has to be added to ensure that EDI is enabled and
502 * operational starting from the next request. This dummy read below
503 * draws the chip's attention and as result the chip enables its EDI.
504 */
505 edi_read(flash, ENE_EC_HWVERSION, &hwversion);
Paul Kocialkowski80ae14e2018-01-15 01:07:46 +0300506
507 probe = edi_chip_probe(flash, &ene_kb9012);
508 if (!probe)
509 return 0;
510
511 rc = edi_8051_reset(flash);
512 if (rc < 0) {
513 msg_perr("%s: Unable to reset 8051!\n", __func__);
514 return 0;
515 }
516
517 register_shutdown(edi_shutdown, (void *)flash);
518
519 return 1;
520}