Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org> |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 6 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 11 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 16 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #include "flash.h" |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 23 | |
| 24 | #define AUTO_PG_ERASE1 0x20 |
| 25 | #define AUTO_PG_ERASE2 0xD0 |
Ollie Lho | cf29de8 | 2004-03-18 19:40:07 +0000 | [diff] [blame] | 26 | #define AUTO_PGRM 0x10 |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 27 | #define CHIP_ERASE 0x30 |
| 28 | #define RESET 0xFF |
| 29 | #define READ_ID 0x90 |
| 30 | |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 31 | static void protect_28sf040(chipaddr bios) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 32 | { |
Carl-Daniel Hailfinger | b885569 | 2009-03-06 00:40:25 +0000 | [diff] [blame] | 33 | uint8_t tmp; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 34 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 35 | tmp = chip_readb(bios + 0x1823); |
| 36 | tmp = chip_readb(bios + 0x1820); |
| 37 | tmp = chip_readb(bios + 0x1822); |
| 38 | tmp = chip_readb(bios + 0x0418); |
| 39 | tmp = chip_readb(bios + 0x041B); |
| 40 | tmp = chip_readb(bios + 0x0419); |
| 41 | tmp = chip_readb(bios + 0x040A); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 42 | } |
| 43 | |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 44 | static void unprotect_28sf040(chipaddr bios) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 45 | { |
Carl-Daniel Hailfinger | b885569 | 2009-03-06 00:40:25 +0000 | [diff] [blame] | 46 | uint8_t tmp; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 47 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 48 | tmp = chip_readb(bios + 0x1823); |
| 49 | tmp = chip_readb(bios + 0x1820); |
| 50 | tmp = chip_readb(bios + 0x1822); |
| 51 | tmp = chip_readb(bios + 0x0418); |
| 52 | tmp = chip_readb(bios + 0x041B); |
| 53 | tmp = chip_readb(bios + 0x0419); |
| 54 | tmp = chip_readb(bios + 0x041A); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 55 | } |
| 56 | |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 57 | static int erase_sector_28sf040(chipaddr bios, unsigned long address) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 58 | { |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 59 | chip_writeb(AUTO_PG_ERASE1, bios); |
| 60 | chip_writeb(AUTO_PG_ERASE2, bios + address); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 61 | |
| 62 | /* wait for Toggle bit ready */ |
| 63 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 64 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 65 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 66 | } |
| 67 | |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 68 | static int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst, |
| 69 | unsigned int page_size) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 70 | { |
| 71 | int i; |
| 72 | |
| 73 | for (i = 0; i < page_size; i++) { |
| 74 | /* transfer data from source to destination */ |
| 75 | if (*src == 0xFF) { |
| 76 | dst++, src++; |
| 77 | /* If the data is 0xFF, don't program it */ |
| 78 | continue; |
| 79 | } |
| 80 | /*issue AUTO PROGRAM command */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 81 | chip_writeb(AUTO_PGRM, dst); |
| 82 | chip_writeb(*src++, dst++); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 83 | |
| 84 | /* wait for Toggle bit ready */ |
| 85 | toggle_ready_jedec(bios); |
| 86 | } |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 87 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 88 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 89 | } |
| 90 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 91 | int probe_28sf040(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 92 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 93 | chipaddr bios = flash->virtual_memory; |
Ed Swierk | 966dc20 | 2007-08-13 04:10:32 +0000 | [diff] [blame] | 94 | uint8_t id1, id2; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 95 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 96 | chip_writeb(RESET, bios); |
Ronald G. Minnich | ef5779d | 2002-01-29 20:18:02 +0000 | [diff] [blame] | 97 | myusec_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 98 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 99 | chip_writeb(READ_ID, bios); |
Ronald G. Minnich | ef5779d | 2002-01-29 20:18:02 +0000 | [diff] [blame] | 100 | myusec_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 101 | id1 = chip_readb(bios); |
Ronald G. Minnich | ef5779d | 2002-01-29 20:18:02 +0000 | [diff] [blame] | 102 | myusec_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 103 | id2 = chip_readb(bios + 0x01); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 104 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 105 | chip_writeb(RESET, bios); |
Ronald G. Minnich | ef5779d | 2002-01-29 20:18:02 +0000 | [diff] [blame] | 106 | myusec_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 107 | |
Peter Stuge | 5cafc33 | 2009-01-25 23:52:45 +0000 | [diff] [blame] | 108 | printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 109 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 110 | return 1; |
| 111 | |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 112 | return 0; |
| 113 | } |
| 114 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 115 | int erase_28sf040(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 116 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 117 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 118 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 119 | unprotect_28sf040(bios); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 120 | chip_writeb(CHIP_ERASE, bios); |
| 121 | chip_writeb(CHIP_ERASE, bios); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 122 | protect_28sf040(bios); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 123 | |
Ronald G. Minnich | ef5779d | 2002-01-29 20:18:02 +0000 | [diff] [blame] | 124 | myusec_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 125 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 126 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 127 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 128 | } |
| 129 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 130 | int write_28sf040(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 131 | { |
| 132 | int i; |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 133 | int total_size = flash->total_size * 1024; |
| 134 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 135 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 136 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 137 | unprotect_28sf040(bios); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 138 | |
Uwe Hermann | a502dce | 2007-10-17 23:55:15 +0000 | [diff] [blame] | 139 | printf("Programming page: "); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 140 | for (i = 0; i < total_size / page_size; i++) { |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 141 | /* erase the page before programming */ |
| 142 | erase_sector_28sf040(bios, i * page_size); |
| 143 | |
| 144 | /* write to the sector */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 145 | printf("%04d at address: 0x%08x", i, i * page_size); |
| 146 | write_sector_28sf040(bios, buf + i * page_size, |
| 147 | bios + i * page_size, page_size); |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 148 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 149 | } |
| 150 | printf("\n"); |
| 151 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 152 | protect_28sf040(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 153 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 154 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 155 | } |