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Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +00004 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000014 */
15
16#include <stdio.h>
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000017#include <string.h>
18#include <stdlib.h>
19#include <ctype.h>
20#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000021#include "programmer.h"
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000022#include "spi.h"
23
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +000024/* Note that CS# is active low, so val=0 means the chip is active. */
Stefan Tauner67d163d2013-01-15 17:37:48 +000025static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000026{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000027 master->set_cs(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000028}
29
Stefan Tauner67d163d2013-01-15 17:37:48 +000030static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000031{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000032 master->set_sck(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000033}
34
Stefan Tauner67d163d2013-01-15 17:37:48 +000035static void bitbang_spi_set_mosi(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000036{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000037 master->set_mosi(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000038}
39
Stefan Tauner67d163d2013-01-15 17:37:48 +000040static int bitbang_spi_get_miso(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000041{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000042 return master->get_miso();
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000043}
44
Stefan Tauner67d163d2013-01-15 17:37:48 +000045static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000046{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000047 if (master->request_bus)
48 master->request_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000049}
50
Stefan Tauner67d163d2013-01-15 17:37:48 +000051static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000052{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000053 if (master->release_bus)
54 master->release_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000055}
56
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000057static int bitbang_spi_send_command(struct flashctx *flash,
58 unsigned int writecnt, unsigned int readcnt,
59 const unsigned char *writearr,
60 unsigned char *readarr);
Michael Karcherb9dbe482011-05-11 17:07:07 +000061
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000062static const struct spi_master spi_master_bitbang = {
Uwe Hermann91f4afa2011-07-28 08:13:25 +000063 .type = SPI_CONTROLLER_BITBANG,
Nico Huber1cf407b2017-11-10 20:18:23 +010064 .features = SPI_MASTER_4BA,
Uwe Hermann91f4afa2011-07-28 08:13:25 +000065 .max_data_read = MAX_DATA_READ_UNLIMITED,
66 .max_data_write = MAX_DATA_WRITE_UNLIMITED,
67 .command = bitbang_spi_send_command,
68 .multicommand = default_spi_send_multicommand,
69 .read = default_spi_read,
70 .write_256 = default_spi_write_256,
Nico Huber7bca1262012-06-15 22:28:12 +000071 .write_aai = default_spi_write_aai,
Michael Karcherb9dbe482011-05-11 17:07:07 +000072};
73
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000074#if 0 // until it is needed
75static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000076{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000077 /* FIXME: Run bitbang_spi_release_bus here or per command? */
78 return 0;
79}
80#endif
81
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000082int register_spi_bitbang_master(const struct bitbang_spi_master *master)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000083{
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000084 struct spi_master mst = spi_master_bitbang;
Carl-Daniel Hailfinger17e23ac2010-07-18 14:42:28 +000085 /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
86 * we catch it here. Same goes for missing initialization of bitbanging
87 * functions.
88 */
89 if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000090 !master->set_sck || !master->set_mosi || !master->get_miso ||
91 (master->request_bus && !master->release_bus) ||
92 (!master->request_bus && master->release_bus)) {
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000093 msg_perr("Incomplete SPI bitbang master setting!\n"
94 "Please report a bug at flashrom@flashrom.org\n");
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000095 return ERROR_FLASHROM_BUG;
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000096 }
97
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000098 mst.data = master;
99 register_spi_master(&mst);
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +0000100
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000101 /* Only mess with the bus if we're sure nobody else uses it. */
102 bitbang_spi_request_bus(master);
103 bitbang_spi_set_cs(master, 1);
104 bitbang_spi_set_sck(master, 0);
105 bitbang_spi_set_mosi(master, 0);
106 /* FIXME: Release SPI bus here and request it again for each command or
107 * don't release it now and only release it on programmer shutdown?
108 */
109 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000110 return 0;
111}
112
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000113static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master,
114 uint8_t val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000115{
116 uint8_t ret = 0;
117 int i;
118
119 for (i = 7; i >= 0; i--) {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000120 bitbang_spi_set_mosi(master, (val >> i) & 1);
121 programmer_delay(master->half_period);
122 bitbang_spi_set_sck(master, 1);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000123 ret <<= 1;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000124 ret |= bitbang_spi_get_miso(master);
125 programmer_delay(master->half_period);
126 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000127 }
128 return ret;
129}
130
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000131static int bitbang_spi_send_command(struct flashctx *flash,
132 unsigned int writecnt, unsigned int readcnt,
133 const unsigned char *writearr,
134 unsigned char *readarr)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000135{
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000136 int i;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000137 const struct bitbang_spi_master *master = flash->mst->spi.data;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000138
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000139 /* FIXME: Run bitbang_spi_request_bus here or in programmer init?
140 * Requesting and releasing the SPI bus is handled in here to allow the
141 * programmer to use its own SPI engine for native accesses.
142 */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000143 bitbang_spi_request_bus(master);
144 bitbang_spi_set_cs(master, 0);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000145 for (i = 0; i < writecnt; i++)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000146 bitbang_spi_rw_byte(master, writearr[i]);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000147 for (i = 0; i < readcnt; i++)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000148 readarr[i] = bitbang_spi_rw_byte(master, 0);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000149
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000150 programmer_delay(master->half_period);
151 bitbang_spi_set_cs(master, 1);
152 programmer_delay(master->half_period);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000153 /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000154 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000155
156 return 0;
157}