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Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +00004 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000014 */
15
16#include <stdio.h>
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000017#include <string.h>
18#include <stdlib.h>
19#include <ctype.h>
20#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000021#include "programmer.h"
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000022#include "spi.h"
23
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +000024/* Note that CS# is active low, so val=0 means the chip is active. */
Stefan Tauner67d163d2013-01-15 17:37:48 +000025static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000026{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000027 master->set_cs(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000028}
29
Stefan Tauner67d163d2013-01-15 17:37:48 +000030static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000031{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000032 master->set_sck(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000033}
34
Stefan Tauner67d163d2013-01-15 17:37:48 +000035static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000036{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000037 if (master->request_bus)
38 master->request_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000039}
40
Stefan Tauner67d163d2013-01-15 17:37:48 +000041static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000042{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000043 if (master->release_bus)
44 master->release_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000045}
46
Daniel Thompsonb623f402018-06-05 09:38:19 +010047static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi)
48{
49 if (master->set_sck_set_mosi) {
50 master->set_sck_set_mosi(sck, mosi);
51 return;
52 }
53
54 master->set_sck(sck);
55 master->set_mosi(mosi);
56}
57
58static int bitbang_spi_set_sck_get_miso(const struct bitbang_spi_master * const master, int sck)
59{
60 if (master->set_sck_get_miso)
61 return master->set_sck_get_miso(sck);
62
63 master->set_sck(sck);
64 return master->get_miso();
65}
66
Edward O'Callaghan5eca4272020-04-12 17:27:53 +100067static int bitbang_spi_send_command(const struct flashctx *flash,
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000068 unsigned int writecnt, unsigned int readcnt,
69 const unsigned char *writearr,
70 unsigned char *readarr);
Michael Karcherb9dbe482011-05-11 17:07:07 +000071
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000072static const struct spi_master spi_master_bitbang = {
Nico Huber1cf407b2017-11-10 20:18:23 +010073 .features = SPI_MASTER_4BA,
Uwe Hermann91f4afa2011-07-28 08:13:25 +000074 .max_data_read = MAX_DATA_READ_UNLIMITED,
75 .max_data_write = MAX_DATA_WRITE_UNLIMITED,
76 .command = bitbang_spi_send_command,
77 .multicommand = default_spi_send_multicommand,
78 .read = default_spi_read,
79 .write_256 = default_spi_write_256,
Nico Huber7bca1262012-06-15 22:28:12 +000080 .write_aai = default_spi_write_aai,
Michael Karcherb9dbe482011-05-11 17:07:07 +000081};
82
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000083#if 0 // until it is needed
84static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000085{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000086 /* FIXME: Run bitbang_spi_release_bus here or per command? */
87 return 0;
88}
89#endif
90
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000091int register_spi_bitbang_master(const struct bitbang_spi_master *master)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000092{
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000093 struct spi_master mst = spi_master_bitbang;
Nico Hubercb44eb72017-04-22 00:09:42 +020094 /* If someone forgot to initialize a bitbang function, we catch it here. */
95 if (!master || !master->set_cs ||
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000096 !master->set_sck || !master->set_mosi || !master->get_miso ||
97 (master->request_bus && !master->release_bus) ||
98 (!master->request_bus && master->release_bus)) {
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000099 msg_perr("Incomplete SPI bitbang master setting!\n"
Nico Huberac90af62022-12-18 00:22:47 +0000100 "Please report a bug at flashrom-stable@flashrom.org\n");
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000101 return ERROR_FLASHROM_BUG;
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000102 }
103
Edward O'Callaghan13f90e62021-01-06 14:10:52 +1100104 /* Cast away `const`, but local code must ensure it's still treated as such. */
105 mst.data = (struct bitbang_spi_master *)master;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000106 register_spi_master(&mst);
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +0000107
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000108 /* Only mess with the bus if we're sure nobody else uses it. */
109 bitbang_spi_request_bus(master);
110 bitbang_spi_set_cs(master, 1);
Daniel Thompsonb623f402018-06-05 09:38:19 +0100111 bitbang_spi_set_sck_set_mosi(master, 0, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000112 /* FIXME: Release SPI bus here and request it again for each command or
113 * don't release it now and only release it on programmer shutdown?
114 */
115 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000116 return 0;
117}
118
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100119static uint8_t bitbang_spi_read_byte(const struct bitbang_spi_master *master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000120{
121 uint8_t ret = 0;
122 int i;
123
124 for (i = 7; i >= 0; i--) {
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100125 if (i == 0)
126 bitbang_spi_set_sck_set_mosi(master, 0, 0);
127 else
128 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000129 programmer_delay(master->half_period);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000130 ret <<= 1;
Daniel Thompsonb623f402018-06-05 09:38:19 +0100131 ret |= bitbang_spi_set_sck_get_miso(master, 1);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000132 programmer_delay(master->half_period);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000133 }
134 return ret;
135}
136
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100137static void bitbang_spi_write_byte(const struct bitbang_spi_master *master, uint8_t val)
138{
139 int i;
140
141 for (i = 7; i >= 0; i--) {
142 bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1);
143 programmer_delay(master->half_period);
144 bitbang_spi_set_sck(master, 1);
145 programmer_delay(master->half_period);
146 }
147}
148
Edward O'Callaghan5eca4272020-04-12 17:27:53 +1000149static int bitbang_spi_send_command(const struct flashctx *flash,
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000150 unsigned int writecnt, unsigned int readcnt,
151 const unsigned char *writearr,
152 unsigned char *readarr)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000153{
Nico Huber519be662018-12-23 20:03:35 +0100154 unsigned int i;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000155 const struct bitbang_spi_master *master = flash->mst->spi.data;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000156
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000157 /* FIXME: Run bitbang_spi_request_bus here or in programmer init?
158 * Requesting and releasing the SPI bus is handled in here to allow the
159 * programmer to use its own SPI engine for native accesses.
160 */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000161 bitbang_spi_request_bus(master);
162 bitbang_spi_set_cs(master, 0);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000163 for (i = 0; i < writecnt; i++)
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100164 bitbang_spi_write_byte(master, writearr[i]);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000165 for (i = 0; i < readcnt; i++)
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100166 readarr[i] = bitbang_spi_read_byte(master);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000167
Daniel Thompsonb623f402018-06-05 09:38:19 +0100168 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000169 programmer_delay(master->half_period);
170 bitbang_spi_set_cs(master, 1);
171 programmer_delay(master->half_period);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000172 /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000173 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000174
175 return 0;
176}