blob: caf1a99316e2296932153eec4c69647ba6ae7375 [file] [log] [blame]
Jason Wanga3f04be2008-11-28 21:36:51 +00001/*
2 * This file is part of the flashrom project.
3 *
Jason Wang13f98ce2008-11-29 15:07:15 +00004 * Copyright (C) 2008 Wang Qingpei <Qingpei.Wang@amd.com>
5 * Copyright (C) 2008 Joe Bao <Zheng.Bao@amd.com>
Uwe Hermann97e8f222009-04-13 21:35:49 +00006 * Copyright (C) 2008 Advanced Micro Devices, Inc.
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +00007 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
Jason Wanga3f04be2008-11-28 21:36:51 +00008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000024#if defined(__i386__) || defined(__x86_64__)
25
Jason Wanga3f04be2008-11-28 21:36:51 +000026#include "flash.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000027#include "chipdrivers.h"
Jason Wanga3f04be2008-11-28 21:36:51 +000028#include "spi.h"
29
Carl-Daniel Hailfinger2c7ba8c2009-06-23 00:47:26 +000030/* This struct is unused, but helps visualize the SB600 SPI BAR layout.
31 *struct sb600_spi_controller {
32 * unsigned int spi_cntrl0; / * 00h * /
33 * unsigned int restrictedcmd1; / * 04h * /
34 * unsigned int restrictedcmd2; / * 08h * /
35 * unsigned int spi_cntrl1; / * 0ch * /
36 * unsigned int spi_cmdvalue0; / * 10h * /
37 * unsigned int spi_cmdvalue1; / * 14h * /
38 * unsigned int spi_cmdvalue2; / * 18h * /
39 * unsigned int spi_fakeid; / * 1Ch * /
40 *};
41 */
Jason Wanga3f04be2008-11-28 21:36:51 +000042
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +000043uint8_t *sb600_spibar = NULL;
Jason Wanga3f04be2008-11-28 21:36:51 +000044
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +000045int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
Jason Wanga3f04be2008-11-28 21:36:51 +000046{
Carl-Daniel Hailfinger38a059d2009-06-13 12:04:03 +000047 /* Maximum read length is 8 bytes. */
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +000048 return spi_read_chunked(flash, buf, start, len, 8);
Jason Wanga3f04be2008-11-28 21:36:51 +000049}
50
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +000051int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len)
Jason Wanga3f04be2008-11-28 21:36:51 +000052{
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +000053 return spi_write_chunked(flash, buf, start, len, 5);
Jason Wanga3f04be2008-11-28 21:36:51 +000054}
55
Carl-Daniel Hailfinger2c7ba8c2009-06-23 00:47:26 +000056static void reset_internal_fifo_pointer(void)
Jason Wanga3f04be2008-11-28 21:36:51 +000057{
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000058 mmio_writeb(mmio_readb(sb600_spibar + 2) | 0x10, sb600_spibar + 2);
Jason Wanga3f04be2008-11-28 21:36:51 +000059
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000060 while (mmio_readb(sb600_spibar + 0xD) & 0x7)
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +000061 msg_pspew("reset\n");
Jason Wanga3f04be2008-11-28 21:36:51 +000062}
63
Carl-Daniel Hailfinger2c7ba8c2009-06-23 00:47:26 +000064static void execute_command(void)
Jason Wanga3f04be2008-11-28 21:36:51 +000065{
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000066 mmio_writeb(mmio_readb(sb600_spibar + 2) | 1, sb600_spibar + 2);
Jason Wanga3f04be2008-11-28 21:36:51 +000067
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000068 while (mmio_readb(sb600_spibar + 2) & 1)
Jason Wanga3f04be2008-11-28 21:36:51 +000069 ;
70}
71
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +000072int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Jason Wanga3f04be2008-11-28 21:36:51 +000073 const unsigned char *writearr, unsigned char *readarr)
74{
75 int count;
76 /* First byte is cmd which can not being sent through FIFO. */
77 unsigned char cmd = *writearr++;
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +000078 unsigned int readoffby1;
Jason Wanga3f04be2008-11-28 21:36:51 +000079
80 writecnt--;
81
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +000082 msg_pspew("%s, cmd=%x, writecnt=%x, readcnt=%x\n",
83 __func__, cmd, writecnt, readcnt);
Jason Wanga3f04be2008-11-28 21:36:51 +000084
85 if (readcnt > 8) {
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +000086 msg_pinfo("%s, SB600 SPI controller can not receive %d bytes, "
Carl-Daniel Hailfinger142e30f2009-07-14 10:26:56 +000087 "it is limited to 8 bytes\n", __func__, readcnt);
88 return SPI_INVALID_LENGTH;
Jason Wanga3f04be2008-11-28 21:36:51 +000089 }
90
91 if (writecnt > 8) {
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +000092 msg_pinfo("%s, SB600 SPI controller can not send %d bytes, "
Carl-Daniel Hailfinger142e30f2009-07-14 10:26:56 +000093 "it is limited to 8 bytes\n", __func__, writecnt);
94 return SPI_INVALID_LENGTH;
Jason Wanga3f04be2008-11-28 21:36:51 +000095 }
96
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +000097 /* This is a workaround for a bug in SB600 and SB700. If we only send
98 * an opcode and no additional data/address, the SPI controller will
99 * read one byte too few from the chip. Basically, the last byte of
100 * the chip response is discarded and will not end up in the FIFO.
101 * It is unclear if the CS# line is set high too early as well.
102 */
103 readoffby1 = (writecnt) ? 0 : 1;
104 mmio_writeb((readcnt + readoffby1) << 4 | (writecnt), sb600_spibar + 1);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000105 mmio_writeb(cmd, sb600_spibar + 0);
Jason Wanga3f04be2008-11-28 21:36:51 +0000106
107 /* Before we use the FIFO, reset it first. */
108 reset_internal_fifo_pointer();
109
110 /* Send the write byte to FIFO. */
111 for (count = 0; count < writecnt; count++, writearr++) {
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +0000112 msg_pspew(" [%x]", *writearr);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000113 mmio_writeb(*writearr, sb600_spibar + 0xC);
Jason Wanga3f04be2008-11-28 21:36:51 +0000114 }
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +0000115 msg_pspew("\n");
Jason Wanga3f04be2008-11-28 21:36:51 +0000116
117 /*
118 * We should send the data by sequence, which means we need to reset
119 * the FIFO pointer to the first byte we want to send.
120 */
121 reset_internal_fifo_pointer();
122
123 execute_command();
124
125 /*
126 * After the command executed, we should find out the index of the
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000127 * received byte. Here we just reset the FIFO pointer and skip the
128 * writecnt.
129 * It would be possible to increase the FIFO pointer by one instead
130 * of reading and discarding one byte from the FIFO.
131 * The FIFO is implemented on top of an 8 byte ring buffer and the
132 * buffer is never cleared. For every byte that is shifted out after
133 * the opcode, the FIFO already stores the response from the chip.
134 * Usually, the chip will respond with 0x00 or 0xff.
Jason Wanga3f04be2008-11-28 21:36:51 +0000135 */
136 reset_internal_fifo_pointer();
137
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000138 /* Skip the bytes we sent. */
Jason Wanga3f04be2008-11-28 21:36:51 +0000139 for (count = 0; count < writecnt; count++) {
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000140 cmd = mmio_readb(sb600_spibar + 0xC);
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +0000141 msg_pspew("[ %2x]", cmd);
Jason Wanga3f04be2008-11-28 21:36:51 +0000142 }
143
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +0000144 msg_pspew("The FIFO pointer after skipping is %d.\n",
145 mmio_readb(sb600_spibar + 0xd) & 0x07);
Jason Wanga3f04be2008-11-28 21:36:51 +0000146 for (count = 0; count < readcnt; count++, readarr++) {
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000147 *readarr = mmio_readb(sb600_spibar + 0xC);
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +0000148 msg_pspew("[%02x]", *readarr);
Jason Wanga3f04be2008-11-28 21:36:51 +0000149 }
Carl-Daniel Hailfinger643415b2010-01-10 01:59:50 +0000150 msg_pspew("\n");
Jason Wanga3f04be2008-11-28 21:36:51 +0000151
152 return 0;
153}
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000154
155#endif