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Ronald G. Minnich5b582f22006-02-23 17:16:44 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000019 */
20
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000021#include <stdlib.h>
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000022#include "flash.h"
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000023
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000024// I need that Berkeley bit-map printer
25void print_lhf00l04_status(uint8_t status)
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000026{
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000027 printf("%s", status & 0x80 ? "Ready:" : "Busy:");
28 printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
29 printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
30 printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
31 printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
32 printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
33 printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000034}
35
36int probe_lhf00l04(struct flashchip *flash)
37{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000038 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000039 uint8_t id1, id2;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000040
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000041#if 0
Stefan Reinauerce532972007-05-23 17:20:56 +000042 /* Enter ID mode */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000043 chip_writeb(0xAA, bios + 0x5555);
44 chip_writeb(0x55, bios + 0x2AAA);
45 chip_writeb(0x90, bios + 0x5555);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000046#endif
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000047
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000048 chip_writeb(0xff, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000049 programmer_delay(10);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000050 chip_writeb(0x90, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000051 programmer_delay(10);
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000052
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000053 id1 = chip_readb(bios);
54 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000055
Stefan Reinauerce532972007-05-23 17:20:56 +000056 /* Leave ID mode */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000057 chip_writeb(0xAA, bios + 0x5555);
58 chip_writeb(0x55, bios + 0x2AAA);
59 chip_writeb(0xF0, bios + 0x5555);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000060
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000061 programmer_delay(10);
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000062
Peter Stuge5cafc332009-01-25 23:52:45 +000063 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000064
Uwe Hermanna8808852007-05-24 19:17:29 +000065 if (id1 != flash->manufacture_id || id2 != flash->model_id)
Stefan Reinauerff4f1972007-05-24 08:48:10 +000066 return 0;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000067
Stefan Reinauerff4f1972007-05-24 08:48:10 +000068 map_flash_registers(flash);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000069
Stefan Reinauerff4f1972007-05-24 08:48:10 +000070 return 1;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000071}
72
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000073uint8_t wait_lhf00l04(chipaddr bios)
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000074{
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000075 uint8_t status;
76 uint8_t id1, id2;
77
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000078 chip_writeb(0x70, bios);
79 if ((chip_readb(bios) & 0x80) == 0) { // it's busy
80 while ((chip_readb(bios) & 0x80) == 0) ;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000081 }
82
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000083 status = chip_readb(bios);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000084
85 // put another command to get out of status register mode
86
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000087 chip_writeb(0x90, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000088 programmer_delay(10);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000089
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000090 id1 = chip_readb(bios);
91 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000092
93 // this is needed to jam it out of "read id" mode
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000094 chip_writeb(0xAA, bios + 0x5555);
95 chip_writeb(0x55, bios + 0x2AAA);
96 chip_writeb(0xF0, bios + 0x5555);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000097
Uwe Hermannffec5f32007-08-23 16:08:21 +000098 return status;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000099}
Uwe Hermannffec5f32007-08-23 16:08:21 +0000100
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000101int erase_lhf00l04_block(struct flashchip *flash, int offset)
102{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000103 chipaddr bios = flash->virtual_memory + offset;
104 chipaddr wrprotect = flash->virtual_registers + offset + 2;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000105 uint8_t status;
106
107 // clear status register
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000108 chip_writeb(0x50, bios);
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000109 printf("Erase at 0x%lx\n", bios);
Stefan Reinauerce532972007-05-23 17:20:56 +0000110 status = wait_lhf00l04(flash->virtual_memory);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000111 print_lhf00l04_status(status);
112 // clear write protect
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000113 printf("write protect is at 0x%lx\n", (wrprotect));
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000114 printf("write protect is 0x%x\n", chip_readb(wrprotect));
115 chip_writeb(0, wrprotect);
116 printf("write protect is 0x%x\n", chip_readb(wrprotect));
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000117
118 // now start it
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000119 chip_writeb(0x20, bios);
120 chip_writeb(0xd0, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000121 programmer_delay(10);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000122 // now let's see what the register is
Stefan Reinauerce532972007-05-23 17:20:56 +0000123 status = wait_lhf00l04(flash->virtual_memory);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000124 print_lhf00l04_status(status);
125 printf("DONE BLOCK 0x%x\n", offset);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000126
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000127 if (check_erased_range(flash, offset, flash->page_size)) {
128 fprintf(stderr, "ERASE FAILED!\n");
129 return -1;
130 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000131 return 0;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000132}
Uwe Hermannffec5f32007-08-23 16:08:21 +0000133
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000134int erase_lhf00l04(struct flashchip *flash)
135{
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000136 int i;
137 unsigned int total_size = flash->total_size * 1024;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000138
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000139 printf("total_size is %d; flash->page_size is %d\n",
140 total_size, flash->page_size);
141 for (i = 0; i < total_size; i += flash->page_size)
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000142 if (erase_lhf00l04_block(flash, i)) {
143 fprintf(stderr, "ERASE FAILED!\n");
144 return -1;
145 }
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000146 printf("DONE ERASE\n");
Uwe Hermannffec5f32007-08-23 16:08:21 +0000147
148 return 0;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000149}
150
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000151void write_page_lhf00l04(chipaddr bios, uint8_t *src,
152 chipaddr dst, int page_size)
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000153{
154 int i;
155
156 for (i = 0; i < page_size; i++) {
157 /* transfer data from source to destination */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000158 chip_writeb(0x40, dst);
159 chip_writeb(*src++, dst++);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000160 wait_lhf00l04(bios);
161 }
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000162}
163
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000164int write_lhf00l04(struct flashchip *flash, uint8_t *buf)
165{
166 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000167 int total_size = flash->total_size * 1024;
168 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000169 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000170
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000171 if (erase_lhf00l04(flash)) {
172 fprintf(stderr, "ERASE FAILED!\n");
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000173 return -1;
174 }
Uwe Hermanna502dce2007-10-17 23:55:15 +0000175 printf("Programming page: ");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000176 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000177 printf("%04d at address: 0x%08x", i, i * page_size);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000178 write_page_lhf00l04(bios, buf + i * page_size,
Uwe Hermanna7e05482007-05-09 10:17:44 +0000179 bios + i * page_size, page_size);
180 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000181 }
182 printf("\n");
Uwe Hermannfd374142007-08-23 15:20:38 +0000183 protect_jedec(bios);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000184
185 return 0;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000186}