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Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +00004 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000014 */
15
16#include <stdio.h>
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000017#include <string.h>
18#include <stdlib.h>
19#include <ctype.h>
20#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000021#include "programmer.h"
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000022#include "spi.h"
23
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +000024/* Note that CS# is active low, so val=0 means the chip is active. */
Stefan Tauner67d163d2013-01-15 17:37:48 +000025static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000026{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000027 master->set_cs(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000028}
29
Stefan Tauner67d163d2013-01-15 17:37:48 +000030static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000031{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000032 master->set_sck(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000033}
34
Stefan Tauner67d163d2013-01-15 17:37:48 +000035static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000036{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000037 if (master->request_bus)
38 master->request_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000039}
40
Stefan Tauner67d163d2013-01-15 17:37:48 +000041static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000042{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000043 if (master->release_bus)
44 master->release_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000045}
46
Daniel Thompsonb623f402018-06-05 09:38:19 +010047static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi)
48{
49 if (master->set_sck_set_mosi) {
50 master->set_sck_set_mosi(sck, mosi);
51 return;
52 }
53
54 master->set_sck(sck);
55 master->set_mosi(mosi);
56}
57
58static int bitbang_spi_set_sck_get_miso(const struct bitbang_spi_master * const master, int sck)
59{
60 if (master->set_sck_get_miso)
61 return master->set_sck_get_miso(sck);
62
63 master->set_sck(sck);
64 return master->get_miso();
65}
66
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000067static int bitbang_spi_send_command(struct flashctx *flash,
68 unsigned int writecnt, unsigned int readcnt,
69 const unsigned char *writearr,
70 unsigned char *readarr);
Michael Karcherb9dbe482011-05-11 17:07:07 +000071
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000072static const struct spi_master spi_master_bitbang = {
Uwe Hermann91f4afa2011-07-28 08:13:25 +000073 .type = SPI_CONTROLLER_BITBANG,
Nico Huber1cf407b2017-11-10 20:18:23 +010074 .features = SPI_MASTER_4BA,
Uwe Hermann91f4afa2011-07-28 08:13:25 +000075 .max_data_read = MAX_DATA_READ_UNLIMITED,
76 .max_data_write = MAX_DATA_WRITE_UNLIMITED,
77 .command = bitbang_spi_send_command,
78 .multicommand = default_spi_send_multicommand,
79 .read = default_spi_read,
80 .write_256 = default_spi_write_256,
Nico Huber7bca1262012-06-15 22:28:12 +000081 .write_aai = default_spi_write_aai,
Michael Karcherb9dbe482011-05-11 17:07:07 +000082};
83
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000084#if 0 // until it is needed
85static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000086{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000087 /* FIXME: Run bitbang_spi_release_bus here or per command? */
88 return 0;
89}
90#endif
91
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000092int register_spi_bitbang_master(const struct bitbang_spi_master *master)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000093{
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000094 struct spi_master mst = spi_master_bitbang;
Carl-Daniel Hailfinger17e23ac2010-07-18 14:42:28 +000095 /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
96 * we catch it here. Same goes for missing initialization of bitbanging
97 * functions.
98 */
99 if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000100 !master->set_sck || !master->set_mosi || !master->get_miso ||
101 (master->request_bus && !master->release_bus) ||
102 (!master->request_bus && master->release_bus)) {
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000103 msg_perr("Incomplete SPI bitbang master setting!\n"
104 "Please report a bug at flashrom@flashrom.org\n");
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000105 return ERROR_FLASHROM_BUG;
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000106 }
107
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000108 mst.data = master;
109 register_spi_master(&mst);
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +0000110
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000111 /* Only mess with the bus if we're sure nobody else uses it. */
112 bitbang_spi_request_bus(master);
113 bitbang_spi_set_cs(master, 1);
Daniel Thompsonb623f402018-06-05 09:38:19 +0100114 bitbang_spi_set_sck_set_mosi(master, 0, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000115 /* FIXME: Release SPI bus here and request it again for each command or
116 * don't release it now and only release it on programmer shutdown?
117 */
118 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000119 return 0;
120}
121
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100122static uint8_t bitbang_spi_read_byte(const struct bitbang_spi_master *master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000123{
124 uint8_t ret = 0;
125 int i;
126
127 for (i = 7; i >= 0; i--) {
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100128 if (i == 0)
129 bitbang_spi_set_sck_set_mosi(master, 0, 0);
130 else
131 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000132 programmer_delay(master->half_period);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000133 ret <<= 1;
Daniel Thompsonb623f402018-06-05 09:38:19 +0100134 ret |= bitbang_spi_set_sck_get_miso(master, 1);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000135 programmer_delay(master->half_period);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000136 }
137 return ret;
138}
139
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100140static void bitbang_spi_write_byte(const struct bitbang_spi_master *master, uint8_t val)
141{
142 int i;
143
144 for (i = 7; i >= 0; i--) {
145 bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1);
146 programmer_delay(master->half_period);
147 bitbang_spi_set_sck(master, 1);
148 programmer_delay(master->half_period);
149 }
150}
151
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000152static int bitbang_spi_send_command(struct flashctx *flash,
153 unsigned int writecnt, unsigned int readcnt,
154 const unsigned char *writearr,
155 unsigned char *readarr)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000156{
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000157 int i;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000158 const struct bitbang_spi_master *master = flash->mst->spi.data;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000159
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000160 /* FIXME: Run bitbang_spi_request_bus here or in programmer init?
161 * Requesting and releasing the SPI bus is handled in here to allow the
162 * programmer to use its own SPI engine for native accesses.
163 */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000164 bitbang_spi_request_bus(master);
165 bitbang_spi_set_cs(master, 0);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000166 for (i = 0; i < writecnt; i++)
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100167 bitbang_spi_write_byte(master, writearr[i]);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000168 for (i = 0; i < readcnt; i++)
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100169 readarr[i] = bitbang_spi_read_byte(master);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000170
Daniel Thompsonb623f402018-06-05 09:38:19 +0100171 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000172 programmer_delay(master->half_period);
173 bitbang_spi_set_cs(master, 1);
174 programmer_delay(master->half_period);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000175 /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000176 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000177
178 return 0;
179}