Aidan Thornton | db4e87d | 2013-08-27 18:01:53 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Support for Atmel AT45DB series DataFlash chips. |
| 3 | * This file is part of the flashrom project. |
| 4 | * |
| 5 | * Copyright (C) 2012 Aidan Thornton |
| 6 | * Copyright (C) 2013 Stefan Tauner |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 20 | */ |
| 21 | |
| 22 | #include <string.h> |
| 23 | #include "flash.h" |
| 24 | #include "chipdrivers.h" |
| 25 | #include "programmer.h" |
| 26 | #include "spi.h" |
| 27 | |
| 28 | /* Status register bits */ |
| 29 | #define AT45DB_READY (1<<7) |
| 30 | #define AT45DB_CMP (1<<6) |
| 31 | #define AT45DB_PROT (1<<1) |
| 32 | #define AT45DB_POWEROF2 (1<<0) |
| 33 | |
| 34 | /* Opcodes */ |
| 35 | #define AT45DB_STATUS 0xD7 /* NB: this is a block erase command on most other chips(!). */ |
| 36 | #define AT45DB_DISABLE_PROTECT 0x3D, 0x2A, 0x7F, 0x9A |
| 37 | #define AT45DB_READ_PROTECT 0x32 |
| 38 | #define AT45DB_READ_LOCKDOWN 0x35 |
| 39 | #define AT45DB_PAGE_ERASE 0x81 |
| 40 | #define AT45DB_BLOCK_ERASE 0x50 |
| 41 | #define AT45DB_SECTOR_ERASE 0x7C |
| 42 | #define AT45DB_CHIP_ERASE 0xC7 |
| 43 | #define AT45DB_CHIP_ERASE_ADDR 0x94809A /* Magic address. See usage. */ |
| 44 | #define AT45DB_BUFFER1_WRITE 0x84 |
| 45 | #define AT45DB_BUFFER1_PAGE_PROGRAM 0x88 |
| 46 | /* Buffer 2 is unused yet. |
| 47 | #define AT45DB_BUFFER2_WRITE 0x87 |
| 48 | #define AT45DB_BUFFER2_PAGE_PROGRAM 0x89 |
| 49 | */ |
| 50 | |
| 51 | static uint8_t at45db_read_status_register(struct flashctx *flash, uint8_t *status) |
| 52 | { |
| 53 | static const uint8_t cmd[] = { AT45DB_STATUS }; |
| 54 | |
| 55 | int ret = spi_send_command(flash, sizeof(cmd), 1, cmd, status); |
| 56 | if (ret != 0) |
| 57 | msg_cerr("Reading the status register failed!\n"); |
| 58 | else |
| 59 | msg_cspew("Status register: 0x%02x.\n", *status); |
| 60 | return ret; |
| 61 | } |
| 62 | |
| 63 | int spi_disable_blockprotect_at45db(struct flashctx *flash) |
| 64 | { |
| 65 | static const uint8_t cmd[4] = { AT45DB_DISABLE_PROTECT }; /* NB: 4 bytes magic number */ |
| 66 | int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); |
| 67 | if (ret != 0) { |
| 68 | msg_cerr("Sending disable lockdown failed!\n"); |
| 69 | return ret; |
| 70 | } |
| 71 | uint8_t status; |
| 72 | ret = at45db_read_status_register(flash, &status); |
| 73 | if (ret != 0 || ((status & AT45DB_PROT) != 0)) { |
| 74 | msg_cerr("Disabling lockdown failed!\n"); |
| 75 | return 1; |
| 76 | } |
| 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | static unsigned int at45db_get_sector_count(struct flashctx *flash) |
| 82 | { |
| 83 | unsigned int i, j; |
| 84 | unsigned int cnt = 0; |
| 85 | for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { |
| 86 | if (flash->chip->block_erasers[i].block_erase == &spi_erase_at45db_sector) { |
| 87 | for (j = 0; j < NUM_ERASEREGIONS; j++) { |
| 88 | cnt += flash->chip->block_erasers[i].eraseblocks[j].count; |
| 89 | } |
| 90 | } |
| 91 | } |
| 92 | msg_cspew("%s: number of sectors=%u\n", __func__, cnt); |
| 93 | return cnt; |
| 94 | } |
| 95 | |
| 96 | /* Reads and prettyprints protection/lockdown registers. |
| 97 | * Some elegance of the printouts had to be cut down a bit to share this code. */ |
| 98 | static uint8_t at45db_prettyprint_protection_register(struct flashctx *flash, uint8_t opcode, const char *regname) |
| 99 | { |
| 100 | const uint8_t cmd[] = { opcode, 0, 0, 0 }; |
| 101 | /* The first two sectors share the first result byte. */ |
| 102 | uint8_t buf[at45db_get_sector_count(flash) - 1]; |
| 103 | |
| 104 | int ret = spi_send_command(flash, sizeof(cmd), sizeof(buf), cmd, buf); |
| 105 | if (ret != 0) { |
| 106 | msg_cerr("Reading the %s register failed!\n", regname); |
| 107 | return ret; |
| 108 | } |
| 109 | |
| 110 | unsigned int i; |
| 111 | for (i = 0; i < sizeof(buf); i++) { |
| 112 | if (buf[i] != 0x00) |
| 113 | break; |
| 114 | if (i == sizeof(buf) - 1) { |
| 115 | msg_cdbg("No Sector is %sed.\n", regname); |
| 116 | return 0; |
| 117 | } |
| 118 | } |
| 119 | |
| 120 | /* TODO: print which addresses are mapped to (un)locked sectors. */ |
| 121 | msg_cdbg("Sector 0a is %s%sed.\n", ((buf[0] & 0xC0) == 0x00) ? "un" : "", regname); |
| 122 | msg_cdbg("Sector 0b is %s%sed.\n", ((buf[0] & 0x30) == 0x00) ? "un" : "", regname); |
| 123 | for (i = 1; i < sizeof(buf); i++) |
| 124 | msg_cdbg("Sector %2u is %s%sed.\n", i, (buf[i] == 0x00) ? "un" : "", regname); |
| 125 | |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | /* bit 7: busy flag |
| 130 | * bit 6: memory/buffer compare result |
| 131 | * bit 5-2: density (encoding see below) |
| 132 | * bit 1: protection enabled (soft or hard) |
| 133 | * bit 0: "power of 2" page size indicator (e.g. 1 means 256B; 0 means 264B) |
| 134 | * |
| 135 | * 5-2 encoding: bit 2 is always 1, bits 3-5 encode the density as "2^(bits - 1)" in Mb e.g.: |
| 136 | * AT45DB161D 1011 16Mb */ |
| 137 | int spi_prettyprint_status_register_at45db(struct flashctx *flash) |
| 138 | { |
| 139 | uint8_t status; |
| 140 | if (at45db_read_status_register(flash, &status) != 0) { |
| 141 | return 1; |
| 142 | } |
| 143 | |
| 144 | msg_cdbg("Chip status register is 0x%02x\n", status); |
| 145 | msg_cdbg("Chip status register: Bit 7 / Ready is %sset\n", (status & AT45DB_READY) ? "" : "not "); |
| 146 | msg_cdbg("Chip status register: Bit 6 / Compare match is %sset\n", (status & AT45DB_CMP) ? "" : "not "); |
| 147 | spi_prettyprint_status_register_bit(status, 5); |
| 148 | spi_prettyprint_status_register_bit(status, 4); |
| 149 | spi_prettyprint_status_register_bit(status, 3); |
| 150 | spi_prettyprint_status_register_bit(status, 2); |
| 151 | const uint8_t dens = (status >> 3) & 0x7; /* Bit 2 is always 1, we use the other bits only */ |
| 152 | msg_cdbg("Chip status register: Density is %u Mb\n", 1 << (dens - 1)); |
| 153 | msg_cdbg("Chip status register: Bit 1 / Protection is %sset\n", (status & AT45DB_PROT) ? "" : "not "); |
| 154 | msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n", |
| 155 | (status & AT45DB_POWEROF2) ? "" : "not "); |
| 156 | if (status & AT45DB_PROT) |
| 157 | at45db_prettyprint_protection_register(flash, AT45DB_READ_PROTECT, "protect"); |
| 158 | |
| 159 | at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock"); |
| 160 | |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | /* Probe function for AT45DB* chips that support multiple page sizes. */ |
| 165 | int probe_spi_at45db(struct flashctx *flash) |
| 166 | { |
| 167 | uint8_t status; |
| 168 | struct flashchip *chip = flash->chip; |
| 169 | |
| 170 | if (!probe_spi_rdid(flash)) |
| 171 | return 0; |
| 172 | |
| 173 | /* Some AT45DB* chips support two different page sizes each (e.g. 264 and 256 B). In order to tell which |
| 174 | * page size this chip has we need to read the status register. */ |
| 175 | if (at45db_read_status_register(flash, &status) != 0) |
| 176 | return 0; |
| 177 | |
| 178 | /* We assume sane power-of-2 page sizes and adjust the chip attributes in case this is not the case. */ |
| 179 | if ((status & AT45DB_POWEROF2) == 0) { |
| 180 | chip->total_size = (chip->total_size / 32) * 33; |
| 181 | chip->page_size = (chip->page_size / 32) * 33; |
| 182 | |
| 183 | unsigned int i, j; |
| 184 | for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { |
| 185 | struct block_eraser *eraser = &chip->block_erasers[i]; |
| 186 | for (j = 0; j < NUM_ERASEREGIONS; j++) { |
| 187 | eraser->eraseblocks[j].size = (eraser->eraseblocks[j].size / 32) * 33; |
| 188 | } |
| 189 | } |
| 190 | } |
| 191 | |
| 192 | switch (chip->page_size) { |
| 193 | case 256: chip->gran = write_gran_256bytes; break; |
| 194 | case 264: chip->gran = write_gran_264bytes; break; |
| 195 | case 512: chip->gran = write_gran_512bytes; break; |
| 196 | case 528: chip->gran = write_gran_528bytes; break; |
| 197 | case 1024: chip->gran = write_gran_1024bytes; break; |
| 198 | case 1056: chip->gran = write_gran_1056bytes; break; |
| 199 | default: |
| 200 | msg_cerr("%s: unknown page size %d.\n", __func__, chip->page_size); |
| 201 | return 0; |
| 202 | } |
| 203 | |
| 204 | msg_cdbg2("%s: total size %i kB, page size %i B\n", __func__, chip->total_size * 1024, chip->page_size); |
| 205 | |
| 206 | return 1; |
| 207 | } |
| 208 | |
| 209 | /* Returns the minimum number of bits needed to represent the given address. |
| 210 | * FIXME: use mind-blowing implementation. |
| 211 | * FIXME: move to utility module. */ |
| 212 | static uint32_t address_to_bits(uint32_t addr) |
| 213 | { |
| 214 | unsigned int lzb = 0; |
| 215 | while (((1 << (31 - lzb)) & ~addr) != 0) |
| 216 | lzb++; |
| 217 | return 32 - lzb; |
| 218 | } |
| 219 | |
| 220 | /* In case of non-power-of-two page sizes we need to convert the address flashrom uses to the address the |
| 221 | * DataFlash chips use. The latter uses a segmented address space where the page address is encoded in the |
| 222 | * more significant bits and the offset within the page is encoded in the less significant bits. The exact |
| 223 | * partition depends on the page size. |
| 224 | */ |
| 225 | static unsigned int at45db_convert_addr(unsigned int addr, unsigned int page_size) |
| 226 | { |
| 227 | unsigned int page_bits = address_to_bits(page_size - 1); |
| 228 | unsigned int at45db_addr = ((addr / page_size) << page_bits) | (addr % page_size); |
| 229 | msg_cspew("%s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x\n", |
| 230 | __func__, addr, page_size, page_bits, at45db_addr); |
| 231 | return at45db_addr; |
| 232 | } |
| 233 | |
| 234 | int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) |
| 235 | { |
| 236 | const unsigned int page_size = flash->chip->page_size; |
| 237 | const unsigned int total_size = flash->chip->total_size * 1024; |
| 238 | if ((addr + len) > total_size) { |
| 239 | msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", |
| 240 | __func__, addr, len, total_size); |
| 241 | return 1; |
| 242 | } |
| 243 | |
| 244 | /* We have to split this up into chunks to fit within the programmer's read size limit, but those |
| 245 | * chunks can cross page boundaries. */ |
| 246 | const unsigned int max_data_read = flash->pgm->spi.max_data_read; |
| 247 | const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; |
| 248 | while (addr < len) { |
| 249 | unsigned int chunk = min(max_chunk, len); |
| 250 | int ret = spi_nbyte_read(flash, at45db_convert_addr(addr, page_size), buf + addr, chunk); |
| 251 | if (ret) { |
| 252 | msg_cerr("%s: error sending read command!\n", __func__); |
| 253 | return ret; |
| 254 | } |
| 255 | addr += chunk; |
| 256 | } |
| 257 | |
| 258 | return 0; |
| 259 | } |
| 260 | |
| 261 | /* Returns 0 when ready, 1 on errors and timeouts. */ |
| 262 | static int at45db_wait_ready (struct flashctx *flash, unsigned int us, unsigned int retries) |
| 263 | { |
| 264 | while (true) { |
| 265 | uint8_t status; |
| 266 | int ret = at45db_read_status_register(flash, &status); |
| 267 | if ((status & AT45DB_READY) == AT45DB_READY) |
| 268 | return 0; |
| 269 | if (ret != 0 || retries-- == 0) |
| 270 | return 1; |
| 271 | programmer_delay(us); |
| 272 | } |
| 273 | } |
| 274 | |
| 275 | static int at45db_erase(struct flashctx *flash, uint8_t opcode, unsigned int at45db_addr, unsigned int stepsize, unsigned int retries) |
| 276 | { |
| 277 | const uint8_t cmd[] = { |
| 278 | opcode, |
| 279 | (at45db_addr >> 16) & 0xff, |
| 280 | (at45db_addr >> 8) & 0xff, |
| 281 | (at45db_addr >> 0) & 0xff |
| 282 | }; |
| 283 | |
| 284 | /* Send erase command. */ |
| 285 | int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); |
| 286 | if (ret != 0) { |
| 287 | msg_cerr("%s: error sending erase command!\n", __func__); |
| 288 | return ret; |
| 289 | } |
| 290 | |
| 291 | /* Wait for completion. */ |
| 292 | ret = at45db_wait_ready(flash, stepsize, retries); |
| 293 | if (ret != 0) |
| 294 | msg_cerr("%s: chip did not became ready again after sending the erase command!\n", __func__); |
| 295 | |
| 296 | return ret; |
| 297 | } |
| 298 | |
| 299 | int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 300 | { |
| 301 | const unsigned int page_size = flash->chip->page_size; |
| 302 | const unsigned int total_size = flash->chip->total_size * 1024; |
| 303 | |
| 304 | if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { |
| 305 | msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); |
| 306 | return 1; |
| 307 | } |
| 308 | |
| 309 | if ((addr + blocklen) > total_size) { |
| 310 | msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", |
| 311 | __func__, addr, blocklen, total_size); |
| 312 | return 1; |
| 313 | } |
| 314 | |
| 315 | /* Needs typically about 35 ms for completion, so let's wait 100 ms in 500 us steps. */ |
| 316 | return at45db_erase(flash, AT45DB_PAGE_ERASE, at45db_convert_addr(addr, page_size), 500, 200); |
| 317 | } |
| 318 | |
| 319 | int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 320 | { |
| 321 | const unsigned int page_size = flash->chip->page_size; |
| 322 | const unsigned int total_size = flash->chip->total_size * 1024; |
| 323 | |
| 324 | if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check blocks not pages |
| 325 | msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); |
| 326 | return 1; |
| 327 | } |
| 328 | |
| 329 | if ((addr + blocklen) > total_size) { |
| 330 | msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", |
| 331 | __func__, addr, blocklen, total_size); |
| 332 | return 1; |
| 333 | } |
| 334 | |
| 335 | /* Needs typically between 20 and 100 ms for completion, so let's wait 300 ms in 1 ms steps. */ |
| 336 | return at45db_erase(flash, AT45DB_BLOCK_ERASE, at45db_convert_addr(addr, page_size), 1000, 300); |
| 337 | } |
| 338 | |
| 339 | int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 340 | { |
| 341 | const unsigned int page_size = flash->chip->page_size; |
| 342 | const unsigned int total_size = flash->chip->total_size * 1024; |
| 343 | |
| 344 | if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check sectors not pages |
| 345 | msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); |
| 346 | return 1; |
| 347 | } |
| 348 | |
| 349 | if ((addr + blocklen) > total_size) { |
| 350 | msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", |
| 351 | __func__, addr, blocklen, total_size); |
| 352 | return 1; |
| 353 | } |
| 354 | |
| 355 | /* Needs typically about 5 s for completion, so let's wait 20 seconds in 200 ms steps. */ |
| 356 | return at45db_erase(flash, AT45DB_SECTOR_ERASE, at45db_convert_addr(addr, page_size), 200000, 100); |
| 357 | } |
| 358 | |
| 359 | int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen) |
| 360 | { |
| 361 | const unsigned int total_size = flash->chip->total_size * 1024; |
| 362 | |
| 363 | if ((addr + blocklen) > total_size) { |
| 364 | msg_cerr("%s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", |
| 365 | __func__, addr, blocklen, total_size); |
| 366 | return 1; |
| 367 | } |
| 368 | |
| 369 | /* Needs typically from about 5 to over 60 s for completion, so let's wait 100 s in 500 ms steps. |
| 370 | * NB: the address is not a real address but a magic number. This hack allows to share code. */ |
| 371 | return at45db_erase(flash, AT45DB_CHIP_ERASE, AT45DB_CHIP_ERASE_ADDR, 500000, 200); |
| 372 | } |
| 373 | |
| 374 | static int at45db_fill_buffer1(struct flashctx *flash, uint8_t *bytes, unsigned int off, unsigned int len) |
| 375 | { |
| 376 | const unsigned int page_size = flash->chip->page_size; |
| 377 | if ((off + len) > page_size) { |
| 378 | msg_cerr("Tried to write %u bytes at offset %u into a buffer of only %u B.\n", |
| 379 | len, off, page_size); |
| 380 | return 1; |
| 381 | } |
| 382 | |
| 383 | /* Create a suitable buffer to store opcode, address and data chunks for buffer1. */ |
| 384 | const unsigned int max_data_write = flash->pgm->spi.max_data_write; |
| 385 | const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ? |
| 386 | max_data_write : page_size; |
| 387 | uint8_t buf[4 + max_chunk]; |
| 388 | |
| 389 | buf[0] = AT45DB_BUFFER1_WRITE; |
| 390 | while (off < page_size) { |
| 391 | unsigned int cur_chunk = min(max_chunk, page_size - off); |
| 392 | buf[1] = (off >> 16) & 0xff; |
| 393 | buf[2] = (off >> 8) & 0xff; |
| 394 | buf[3] = (off >> 0) & 0xff; |
| 395 | memcpy(&buf[4], bytes + off, cur_chunk); |
| 396 | int ret = spi_send_command(flash, 4 + cur_chunk, 0, buf, NULL); |
| 397 | if (ret != 0) { |
| 398 | msg_cerr("%s: error sending buffer write!\n", __func__); |
| 399 | return ret; |
| 400 | } |
| 401 | off += cur_chunk; |
| 402 | } |
| 403 | return 0; |
| 404 | } |
| 405 | |
| 406 | static int at45db_commit_buffer1(struct flashctx *flash, unsigned int at45db_addr) |
| 407 | { |
| 408 | const uint8_t cmd[] = { |
| 409 | AT45DB_BUFFER1_PAGE_PROGRAM, |
| 410 | (at45db_addr >> 16) & 0xff, |
| 411 | (at45db_addr >> 8) & 0xff, |
| 412 | (at45db_addr >> 0) & 0xff |
| 413 | }; |
| 414 | |
| 415 | /* Send buffer to device. */ |
| 416 | int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); |
| 417 | if (ret != 0) { |
| 418 | msg_cerr("%s: error sending buffer to main memory command!\n", __func__); |
| 419 | return ret; |
| 420 | } |
| 421 | |
| 422 | /* Wait for completion (typically a few ms). */ |
| 423 | ret = at45db_wait_ready(flash, 250, 200); // 50 ms |
| 424 | if (ret != 0) { |
| 425 | msg_cerr("%s: chip did not became ready again!\n", __func__); |
| 426 | return ret; |
| 427 | } |
| 428 | |
| 429 | return 0; |
| 430 | } |
| 431 | |
| 432 | static int at45db_program_page(struct flashctx *flash, uint8_t *buf, unsigned int at45db_addr) |
| 433 | { |
| 434 | int ret = at45db_fill_buffer1(flash, buf, 0, flash->chip->page_size); |
| 435 | if (ret != 0) { |
| 436 | msg_cerr("%s: filling the buffer failed!\n", __func__); |
| 437 | return ret; |
| 438 | } |
| 439 | |
| 440 | ret = at45db_commit_buffer1(flash, at45db_addr); |
| 441 | if (ret != 0) { |
| 442 | msg_cerr("%s: committing page failed!\n", __func__); |
| 443 | return ret; |
| 444 | } |
| 445 | |
| 446 | return 0; |
| 447 | } |
| 448 | |
| 449 | int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) |
| 450 | { |
| 451 | const unsigned int page_size = flash->chip->page_size; |
| 452 | const unsigned int total_size = flash->chip->total_size; |
| 453 | |
| 454 | if ((start % page_size) != 0 || (len % page_size) != 0) { |
| 455 | msg_cerr("%s: cannot write partial pages: start=%u, len=%u\n", __func__, start, len); |
| 456 | return 1; |
| 457 | } |
| 458 | |
| 459 | if ((start + len) > (total_size * 1024)) { |
| 460 | msg_cerr("%s: tried to write beyond flash boundary: start=%u, len=%u, size=%u\n", |
| 461 | __func__, start, len, total_size); |
| 462 | return 1; |
| 463 | } |
| 464 | |
| 465 | unsigned int i; |
| 466 | for (i = 0; i < len; i += page_size) { |
| 467 | if (at45db_program_page(flash, buf + i, at45db_convert_addr(start + i, page_size)) != 0) { |
| 468 | msg_cerr("Writing page %u failed!\n", i); |
| 469 | return 1; |
| 470 | } |
| 471 | } |
| 472 | return 0; |
| 473 | } |