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Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __FLASHCHIPS_H__
25#define __FLASHCHIPS_H__ 1
26
27/*
28 * Please keep this list sorted alphabetically by manufacturer. The first
29 * entry of each section should be the manufacturer ID, followed by the
30 * list of devices from that manufacturer (sorted by device IDs).
31 *
32 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
33 * continuation code.
34 * SPI parts have 16-bit device IDs if they support RDID.
35 */
36
Stefan Taunerac1b4c82012-02-17 14:51:04 +000037#define GENERIC_MANUF_ID 0xFFFF /* Check if there is a vendor ID */
38#define GENERIC_DEVICE_ID 0xFFFF /* Only match the vendor ID */
39#define SFDP_DEVICE_ID 0xFFFE
40#define PROGMANUF_ID 0xFFFE /* dummy ID for opaque chips behind a programmer */
41#define PROGDEV_ID 0x01 /* dummy ID for opaque chips behind a programmer */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000042
43#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Mattias Mattssoneaf5ead2010-09-18 23:42:36 +000044#define ALLIANCE_AS29F002B 0x34
45#define ALLIANCE_AS29F002T 0xB0
46#define ALLIANCE_AS29F010 0x04
47#define ALLIANCE_AS29F040 0xA4
48#define ALLIANCE_AS29F200B 0x57
49#define ALLIANCE_AS29F200T 0x51
50#define ALLIANCE_AS29LV160B 0x49
51#define ALLIANCE_AS29LV160T 0xCA
52#define ALLIANCE_AS29LV400B 0xBA
53#define ALLIANCE_AS29LV400T 0xB9
54#define ALLIANCE_AS29LV800B 0x5B
55#define ALLIANCE_AS29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000056
57#define AMD_ID 0x01 /* AMD */
Mattias Mattsson6eabe282010-09-15 23:31:03 +000058#define AMD_AM29DL400BT 0x0C
59#define AMD_AM29DL400BB 0x0F
60#define AMD_AM29DL800BT 0x4A
61#define AMD_AM29DL800BB 0xCB
62#define AMD_AM29F002BB 0x34 /* Same as Am29F002NBB */
63#define AMD_AM29F002BT 0xB0 /* Same as Am29F002NBT */
64#define AMD_AM29F004BB 0x7B
65#define AMD_AM29F004BT 0x77
66#define AMD_AM29F016D 0xAD
67#define AMD_AM29F010B 0x20 /* Same as Am29F010A */
68#define AMD_AM29F040B 0xA4
69#define AMD_AM29F080B 0xD5
70#define AMD_AM29F200BB 0x57
71#define AMD_AM29F200BT 0x51
72#define AMD_AM29F400BB 0xAB
73#define AMD_AM29F400BT 0x23
74#define AMD_AM29F800BB 0x58
75#define AMD_AM29F800BT 0xD6
Carl-Daniel Hailfingerc753e5b2011-02-05 12:11:17 +000076#define AMD_AM29LV001BB 0x6D
77#define AMD_AM29LV001BT 0xED
Mattias Mattsson6eabe282010-09-15 23:31:03 +000078#define AMD_AM29LV002BB 0xC2
79#define AMD_AM29LV002BT 0x40
80#define AMD_AM29LV004BB 0xB6
81#define AMD_AM29LV004BT 0xB5
82#define AMD_AM29LV008BB 0x37
83#define AMD_AM29LV008BT 0x3E
84#define AMD_AM29LV040B 0x4F
85#define AMD_AM29LV080B 0x38 /* Same as Am29LV081B */
86#define AMD_AM29LV200BB 0xBF
87#define AMD_AM29LV200BT 0x3B
88#define AMD_AM29LV800BB 0x5B /* Same as Am29LV800DB */
89#define AMD_AM29LV400BT 0xB9
90#define AMD_AM29LV400BB 0xBA
91#define AMD_AM29LV800BT 0xDA /* Same as Am29LV800DT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000092
93#define AMIC_ID 0x7F37 /* AMIC */
94#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Daniel Lenskidf90d3a2010-07-22 11:44:38 +000095#define AMIC_A25L05PT 0x2020
96#define AMIC_A25L05PU 0x2010
97#define AMIC_A25L10PT 0x2021
98#define AMIC_A25L10PU 0x2011
99#define AMIC_A25L20PT 0x2022
100#define AMIC_A25L20PU 0x2012
101#define AMIC_A25L40PT 0x2013 /* Datasheet says T and U have
102 same device ID. Confirmed by
103 hardware testing. */
104#define AMIC_A25L40PU 0x2013
105#define AMIC_A25L80P 0x2014 /* Seems that no A25L80PT exists */
106#define AMIC_A25L16PT 0x2025
107#define AMIC_A25L16PU 0x2015
Dan Lenski11617122010-07-29 15:00:40 +0000108#define AMIC_A25L512 0x3010
109#define AMIC_A25L010 0x3011
110#define AMIC_A25L020 0x3012
111#define AMIC_A25L040 0x3013
112#define AMIC_A25L080 0x3014
113#define AMIC_A25L016 0x3015
114#define AMIC_A25L032 0x3016
115#define AMIC_A25LQ032 0x4016
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000116#define AMIC_A29002B 0x0d
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000117#define AMIC_A29002T 0x8C /* Same as A290021T */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000118#define AMIC_A29040B 0x86
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000119#define AMIC_A29400T 0xB0 /* Same as 294001T */
120#define AMIC_A29400U 0x31 /* Same as A294001U */
121#define AMIC_A29800T 0x0E
122#define AMIC_A29800U 0x8F
123#define AMIC_A29L004T 0x34 /* Same as A29L400T */
124#define AMIC_A29L004U 0xB5 /* Same as A29L400U */
125#define AMIC_A29L008T 0x1A /* Same as A29L800T */
126#define AMIC_A29L008U 0x9B /* Same as A29L800U */
127#define AMIC_A29L040 0x92
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000128#define AMIC_A49LF040A 0x9d
129
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000130#define ATMEL_ID 0x1F /* Atmel */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000131#define ATMEL_AT25DF021 0x4300
132#define ATMEL_AT25DF041A 0x4401
133#define ATMEL_AT25DF081 0x4502
134#define ATMEL_AT25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */
135#define ATMEL_AT25DF161 0x4602
136#define ATMEL_AT25DF321 0x4700 /* Same as 26DF321 */
137#define ATMEL_AT25DF321A 0x4701
138#define ATMEL_AT25DF641 0x4800
139#define ATMEL_AT25DQ161 0x8600
140#define ATMEL_AT25F512 /* No device ID found in datasheet. Vendor ID
Carl-Daniel Hailfingerfd7075a2010-07-29 13:09:18 +0000141 * can be read with AT25F512A_RDID */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000142#define ATMEL_AT25F512A 0x65 /* Needs AT25F512A_RDID */
143#define ATMEL_AT25F512B 0x6500
144#define ATMEL_AT25F1024 /* No device ID found in datasheet. Vendor ID
Carl-Daniel Hailfingerfd7075a2010-07-29 13:09:18 +0000145 * can be read with AT25F512A_RDID */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000146#define ATMEL_AT25F1024A 0x60 /* Needs AT25F512A_RDID */
147#define ATMEL_AT25FS010 0x6601
148#define ATMEL_AT25FS040 0x6604
149#define ATMEL_AT26DF041 0x4400
150#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
Stefan Taunerc0aaf952011-05-19 02:58:17 +0000151#define ATMEL_AT26DF081A 0x4501
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000152#define ATMEL_AT26DF161 0x4600
Stefan Taunerc0aaf952011-05-19 02:58:17 +0000153#define ATMEL_AT26DF161A 0x4601
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000154#define ATMEL_AT26DF321 0x4700 /* Same as 25DF321 */
155#define ATMEL_AT26F004 0x0400
156#define ATMEL_AT29C040A 0xA4
157#define ATMEL_AT29C010A 0xD5
158#define ATMEL_AT29C020 0xDA
159#define ATMEL_AT29C512 0x5D
160#define ATMEL_AT45BR3214B /* No ID available */
161#define ATMEL_AT45CS1282 0x2920
162#define ATMEL_AT45D011 /* No ID available */
163#define ATMEL_AT45D021A /* No ID available */
164#define ATMEL_AT45D041A /* No ID available */
165#define ATMEL_AT45D081A /* No ID available */
166#define ATMEL_AT45D161 /* No ID available */
167#define ATMEL_AT45DB011 /* No ID available */
168#define ATMEL_AT45DB011B /* No ID available */
169#define ATMEL_AT45DB011D 0x2200
170#define ATMEL_AT45DB021A /* No ID available */
171#define ATMEL_AT45DB021B /* No ID available */
172#define ATMEL_AT45DB021D 0x2300
173#define ATMEL_AT45DB041A /* No ID available */
174#define ATMEL_AT45DB041D 0x2400
175#define ATMEL_AT45DB081A /* No ID available */
176#define ATMEL_AT45DB081D 0x2500
177#define ATMEL_AT45DB161 /* No ID available */
178#define ATMEL_AT45DB161B /* No ID available */
179#define ATMEL_AT45DB161D 0x2600
180#define ATMEL_AT45DB321 /* No ID available */
181#define ATMEL_AT45DB321B /* No ID available */
182#define ATMEL_AT45DB321C 0x2700
183#define ATMEL_AT45DB321D 0x2701 /* Buggy data sheet */
184#define ATMEL_AT45DB642 /* No ID available */
185#define ATMEL_AT45DB642D 0x2800
186#define ATMEL_AT49BV512 0x03
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000187#define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */
Uwe Hermannc74e9772011-09-08 19:55:18 +0000188#define ATMEL_AT49LH002 0xE9
David Borgf5a30f62012-04-15 13:16:32 +0000189#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */
Andrew Morgan8dd97f92012-08-13 23:43:46 +0000190#define ATMEL_AT49F010 0x17 /* Same as AT49HF010 */
David Borgf5a30f62012-04-15 13:16:32 +0000191#define ATMEL_AT49F020 0x0B
192#define ATMEL_AT49F040 0x13
Andrew Morgan8dd97f92012-08-13 23:43:46 +0000193#define ATMEL_AT49F080 0x23
194#define ATMEL_AT49F080T 0x27
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000195
Joshua Roysf1324e02010-09-16 00:51:51 +0000196/* Bright Microelectronics has the same manufacturer ID as Hyundai... */
197#define BRIGHT_ID 0xAD /* Bright Microelectronics */
198#define BRIGHT_BM29F040 0x40
199#define BRIGHT_BM29F400B 0xAB
200#define BRIGHT_BM29F400T 0xAD
201
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000202#define CATALYST_ID 0x31 /* Catalyst */
Andrew Morganca081462011-09-13 22:05:44 +0000203#define CATALYST_CAT28F512 0xB8
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000204
205#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
Michael Karcher80a59ea2010-06-19 22:06:35 +0000206#define EMST_F25L008A 0x2014
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000207#define EMST_F49B002UA 0x00
208
209/*
210 * EN25 chips are SPI, first byte of device ID is memory type,
211 * second byte of device ID is log(bitsize)-9.
212 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
213 * is the continuation code for IDs in bank 2.
214 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
215 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
216 * Let's hope they are not manufacturing SPI flash chips as well.
217 */
218#define EON_ID 0x7F1C /* EON Silicon Devices */
219#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000220#define EON_EN25B05 0x2010 /* Same as P05, 2^19 kbit or 2^16 kByte */
221#define EON_EN25B05T 0x25
222#define EON_EN25B05B 0x95
223#define EON_EN25B10 0x2011 /* Same as P10 */
224#define EON_EN25B10T 0x40
225#define EON_EN25B10B 0x30
226#define EON_EN25B20 0x2012 /* Same as P20 */
227#define EON_EN25B20T 0x41
228#define EON_EN25B20B 0x31
229#define EON_EN25B40 0x2013 /* Same as P40 */
230#define EON_EN25B40T 0x42
231#define EON_EN25B40B 0x32
232#define EON_EN25B80 0x2014 /* Same as P80 */
233#define EON_EN25B80T 0x43
234#define EON_EN25B80B 0x33
235#define EON_EN25B16 0x2015 /* Same as P16 */
236#define EON_EN25B16T 0x44
237#define EON_EN25B16B 0x34
238#define EON_EN25B32 0x2016 /* Same as P32 */
239#define EON_EN25B32T 0x45
240#define EON_EN25B32B 0x35
241#define EON_EN25B64 0x2017 /* Same as P64 */
242#define EON_EN25B64T 0x46
243#define EON_EN25B64B 0x36
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000244#define EON_EN25F05 0x3110
245#define EON_EN25F10 0x3111
246#define EON_EN25F20 0x3112
247#define EON_EN25F40 0x3113
248#define EON_EN25F80 0x3114
249#define EON_EN25F16 0x3115
250#define EON_EN25F32 0x3116
David Hendricks6d715302011-07-24 22:21:57 +0000251#define EON_EN25Q40 0x3013
252#define EON_EN25Q80 0x3014
253#define EON_EN25Q16 0x3015 /* Same as EN25D16 */
254#define EON_EN25Q32 0x3016 /* Same as EN25Q32A and EN25Q32B */
255#define EON_EN25Q64 0x3017
256#define EON_EN25Q128 0x3018
257#define EON_EN25QH16 0x7015
Stefan Tauner2cef9162012-05-14 01:51:46 +0000258#define EON_EN25QH32 0x7016
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000259#define EON_EN29F512 0x7F21
260#define EON_EN29F010 0x20
261#define EON_EN29F040A 0x7F04
262#define EON_EN29LV010 0x7F6E
263#define EON_EN29LV040A 0x7F4F /* EN29LV040(A) */
Rudolf Marek47eff6b2012-04-14 22:51:40 +0000264#define EON_EN29LV640B 0xCB
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000265#define EON_EN29F002T 0x7F92 /* Same as EN29F002A */
266#define EON_EN29F002B 0x7F97 /* Same as EN29F002AN */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000267
268#define FUJITSU_ID 0x04 /* Fujitsu */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000269#define FUJITSU_MBM29DL400BC 0x0F
270#define FUJITSU_MBM29DL400TC 0x0C
271#define FUJITSU_MBM29DL800BA 0xCB
272#define FUJITSU_MBM29DL800TA 0x4A
273#define FUJITSU_MBM29F002BC 0x34
274#define FUJITSU_MBM29F002TC 0xB0
275#define FUJITSU_MBM29F004BC 0x7B
276#define FUJITSU_MBM29F004TC 0x77
277#define FUJITSU_MBM29F040C 0xA4
278#define FUJITSU_MBM29F080A 0xD5
279#define FUJITSU_MBM29F200BC 0x57
280#define FUJITSU_MBM29F200TC 0x51
281#define FUJITSU_MBM29F400BC 0xAB
282#define FUJITSU_MBM29F400TC 0x23
283#define FUJITSU_MBM29F800BA 0x58
284#define FUJITSU_MBM29F800TA 0xD6
285#define FUJITSU_MBM29LV002BC 0xC2
286#define FUJITSU_MBM29LV002TC 0x40
287#define FUJITSU_MBM29LV004BC 0xB6
288#define FUJITSU_MBM29LV004TC 0xB5
289#define FUJITSU_MBM29LV008BA 0x37
290#define FUJITSU_MBM29LV008TA 0x3E
291#define FUJITSU_MBM29LV080A 0x38
292#define FUJITSU_MBM29LV200BC 0xBF
293#define FUJITSU_MBM29LV200TC 0x3B
294#define FUJITSU_MBM29LV400BC 0xBA
295#define FUJITSU_MBM29LV400TC 0xB9
296#define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */
297#define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000298
Justin Chevrier1525b2a2012-04-14 21:59:23 +0000299#define GIGADEVICE_ID 0xC8 /* GigaDevice */
300#define GIGADEVICE_GD25Q20 0x4012
301#define GIGADEVICE_GD25Q40 0x4013
302#define GIGADEVICE_GD25Q80 0x4014
303#define GIGADEVICE_GD25Q16 0x4015
304#define GIGADEVICE_GD25Q32 0x4016
305#define GIGADEVICE_GD25Q64 0x4017
306#define GIGADEVICE_GD25Q128 0x4018
307
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000308#define HYUNDAI_ID 0xAD /* Hyundai */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000309#define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */
310#define HYUNDAI_HY29F800B 0x58 /* Same as HY29F800AB */
311#define HYUNDAI_HY29LV800B 0x5B
312#define HYUNDAI_HY29F040A 0xA4
313#define HYUNDAI_HY29F400B 0xAB /* Same as HY29F400AB */
314#define HYUNDAI_HY29F002B 0x34
315#define HYUNDAI_HY29F002T 0xB0
316#define HYUNDAI_HY29LV400T 0xB9
317#define HYUNDAI_HY29LV400B 0xBA
318#define HYUNDAI_HY29F080 0xD5
319#define HYUNDAI_HY29F800T 0xD6 /* Same as HY29F800AT */
320#define HYUNDAI_HY29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000321
322#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000323#define IMT_IM29F004B 0xAE
324#define IMT_IM29F004T 0xAF
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000325
326#define INTEL_ID 0x89 /* Intel */
Mattias Mattssoncbee4a72010-10-05 20:28:36 +0000327#define INTEL_28F320J5 0x14
328#define INTEL_28F640J5 0x15
329#define INTEL_28F320J3 0x16
330#define INTEL_28F640J3 0x17
331#define INTEL_28F128J3 0x18
332#define INTEL_28F256J3 0x1D
333#define INTEL_28F400T 0x70 /* 28F400BV/BX/CE/CV-T */
334#define INTEL_28F400B 0x71 /* 28F400BV/BX/CE/CV-B */
335#define INTEL_28F200T 0x74 /* 28F200BL/BV/BX/CV-T */
336#define INTEL_28F200B 0x75 /* 28F200BL/BV/BX/CV-B */
337#define INTEL_28F004T 0x78 /* 28F004B5/BE/BV/BX-T */
338#define INTEL_28F004B 0x79 /* 28F004B5/BE/BV/BX-B */
339#define INTEL_28F002T 0x7C /* 28F002BC/BL/BV/BX-T */
340#define INTEL_28F002B 0x7D /* 28F002BL/BV/BX-B */
341#define INTEL_28F001T 0x94 /* 28F001BN/BX-T */
342#define INTEL_28F001B 0x95 /* 28F001BN/BX-B */
343#define INTEL_28F008T 0x98 /* 28F008BE/BV-T */
344#define INTEL_28F008B 0x99 /* 28F008BE/BV-B */
345#define INTEL_28F800T 0x9C /* 28F800B5/BV/CE/CV-T */
346#define INTEL_28F800B 0x9D /* 28F800B5/BV/CE/CV-B */
347#define INTEL_28F016SV 0xA0 /* 28F016SA/SV */
348#define INTEL_28F008SA 0xA2
349#define INTEL_28F008S3 0xA6 /* 28F008S3/S5/SC */
350#define INTEL_28F004S3 0xA7 /* 28F008S3/S5/SC */
351#define INTEL_28F016XS 0xA8
352#define INTEL_28F016S3 0xAA /* 28F016S3/S5/SC */
353#define INTEL_82802AC 0xAC
354#define INTEL_82802AB 0xAD
355#define INTEL_28F010 0xB4
356#define INTEL_28F512 0xB8
357#define INTEL_28F256A 0xB9
358#define INTEL_28F020 0xBD
359#define INTEL_28F016B3T 0xD0 /* 28F016B3-T */
360#define INTEL_28F016B3B 0xD1 /* 28F016B3-B */
361#define INTEL_28F008B3T 0xD2 /* 28F008B3-T */
362#define INTEL_28F008B3B 0xD3 /* 28F008B3-B */
363#define INTEL_28F004B3T 0xD4 /* 28F004B3-T */
364#define INTEL_28F004B3B 0xD5 /* 28F004B3-B */
365
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000366#define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */
367#define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000368
369#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
370
371/*
372 * MX25 chips are SPI, first byte of device ID is memory type,
373 * second byte of device ID is log(bitsize)-9.
374 * Generalplus SPI chips seem to be compatible with Macronix
375 * and use the same set of IDs.
376 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000377#define MACRONIX_ID 0xC2 /* Macronix (MX) */
378#define MACRONIX_MX25L512 0x2010 /* Same as MX25V512 */
379#define MACRONIX_MX25L1005 0x2011
380#define MACRONIX_MX25L2005 0x2012
381#define MACRONIX_MX25L4005 0x2013 /* MX25L4005{,A} */
382#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */
383#define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */
384#define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */
Paul Menzelac427b22012-02-16 21:07:07 +0000385#define MACRONIX_MX25L6405 0x2017 /* MX25L6405{,D}, MX25L6406E, MX25L6436E */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000386#define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */
387#define MACRONIX_MX25L1635D 0x2415
388#define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */
389#define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
390#define MACRONIX_MX29F001B 0x19
391#define MACRONIX_MX29F001T 0x18
Sylvain "ythier" Hitier3093f8f2011-09-03 11:22:27 +0000392#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB; N has reset pin n/c. */
393#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT; N has reset pin n/c. */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000394#define MACRONIX_MX29F004B 0x46
395#define MACRONIX_MX29F004T 0x45
396#define MACRONIX_MX29F022T 0x36 /* Same as MX29F022NT */
397#define MACRONIX_MX29F040 0xA4 /* Same as MX29F040C */
398#define MACRONIX_MX29F080 0xD5
399#define MACRONIX_MX29F200B 0x57 /* Same as MX29F200CB */
400#define MACRONIX_MX29F200T 0x51 /* Same as MX29F200CT */
401#define MACRONIX_MX29F400B 0xAB /* Same as MX29F400CB */
402#define MACRONIX_MX29F400T 0x23 /* Same as MX29F400CT */
403#define MACRONIX_MX29F800B 0x58
404#define MACRONIX_MX29F800T 0xD6
405#define MACRONIX_MX29LV002CB 0x5A
406#define MACRONIX_MX29LV002CT 0x59
407#define MACRONIX_MX29LV004B 0xB6 /* Same as MX29LV004CB */
408#define MACRONIX_MX29LV004T 0xB5 /* Same as MX29LV004CT */
409#define MACRONIX_MX29LV008B 0x37 /* Same as MX29LV008CB */
410#define MACRONIX_MX29LV008T 0x3E /* Same as MX29LV008CT */
411#define MACRONIX_MX29LV040 0x4F /* Same as MX29LV040C */
412#define MACRONIX_MX29LV081 0x38
413#define MACRONIX_MX29LV128DB 0x7A
414#define MACRONIX_MX29LV128DT 0x7E
415#define MACRONIX_MX29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
416#define MACRONIX_MX29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
417#define MACRONIX_MX29LV320DB 0xA8 /* Same as MX29LV321DB */
418#define MACRONIX_MX29LV320DT 0xA7 /* Same as MX29LV321DT */
419#define MACRONIX_MX29LV400B 0xBA /* Same as MX29LV400CB */
420#define MACRONIX_MX29LV400T 0xB9 /* Same as MX29LV400CT */
421#define MACRONIX_MX29LV640DB 0xCB /* Same as MX29LV640EB */
422#define MACRONIX_MX29LV640DT 0xC9 /* Same as MX29LV640ET */
423#define MACRONIX_MX29LV800B 0x5B /* Same as MX29LV800CB */
424#define MACRONIX_MX29LV800T 0xDA /* Same as MX29LV800CT */
425#define MACRONIX_MX29SL402CB 0xF1
426#define MACRONIX_MX29SL402CT 0x70
427#define MACRONIX_MX29SL800CB 0x6B /* Same as MX29SL802CB */
428#define MACRONIX_MX29SL800CT 0xEA /* Same as MX29SL802CT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000429
430/*
431 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
432 * have a 0x7F continuation code prefix.
433 */
434#define PMC_ID 0x7F9D /* PMC */
435#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000436#define PMC_PM25LV512 0x7B
437#define PMC_PM25LV010 0x7C
438#define PMC_PM25LV020 0x7D
439#define PMC_PM25LV040 0x7E
440#define PMC_PM25LV080B 0x13
441#define PMC_PM25LV016B 0x14
442#define PMC_PM29F002T 0x1D
443#define PMC_PM29F002B 0x2D
444#define PMC_PM39LV512 0x1B
445#define PMC_PM39F010 0x1C /* Same as Pm39LV010 */
446#define PMC_PM39LV020 0x3D
447#define PMC_PM39LV040 0x3E
448#define PMC_PM39F020 0x4D
449#define PMC_PM39F040 0x4E
450#define PMC_PM49FL002 0x6D
451#define PMC_PM49FL004 0x6E
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000452
Sean Nelson118e1d62009-11-24 02:08:11 +0000453/*
454 * The Sanyo chip found so far uses SPI, first byte is manufacture code,
455 * second byte is the device code,
456 * third byte is a dummy byte.
457 */
458#define SANYO_ID 0x62
459#define SANYO_LE25FW203A 0x1600
460
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000461#define SHARP_ID 0xB0 /* Sharp */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000462#define SHARP_LH28F008BJxxPT 0xEC
463#define SHARP_LH28F008BJxxPB 0xED
464#define SHARP_LH28F800BVxxBTL 0x4B
465#define SHARP_LH28F800BVxxBV 0x4D
466#define SHARP_LH28F800BVxxTV 0x4C
467#define SHARP_LHF00L02 0xC9 /* Same as LHF00L06/LHF00L07 */
468#define SHARP_LHF00L04 0xCF /* Same as LHF00L03/LHF00L05 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000469
470/*
471 * Spansion was previously a joint venture of AMD and Fujitsu.
472 * S25 chips are SPI. The first device ID byte is memory type and
473 * the second device ID byte is memory capacity.
474 */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000475#define SPANSION_ID 0x01 /* Spansion, same ID as AMD */
Rudy Hostf4e57772010-11-29 00:37:49 +0000476#define SPANSION_S25FL004A 0x0212
Michael Karcher23ff4602010-01-12 23:29:30 +0000477#define SPANSION_S25FL008A 0x0213
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000478#define SPANSION_S25FL016A 0x0214
Rudy Hostf4e57772010-11-29 00:37:49 +0000479#define SPANSION_S25FL032A 0x0215
480#define SPANSION_S25FL064A 0x0216
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000481
482/*
483 * SST25 chips are SPI, first byte of device ID is memory type, second
484 * byte of device ID is related to log(bitsize) at least for some chips.
485 */
486#define SST_ID 0xBF /* SST */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000487#define SST_SST25WF512 0x2501
488#define SST_SST25WF010 0x2502
489#define SST_SST25WF020 0x2503
490#define SST_SST25WF040 0x2504
491#define SST_SST25VF512A_REMS 0x48 /* REMS or RES opcode */
492#define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode */
493#define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode */
494#define SST_SST25VF040_REMS 0x44 /* REMS or RES opcode, same as SST25LF040A */
495#define SST_SST25VF040B 0x258D
496#define SST_SST25VF040B_REMS 0x8D /* REMS or RES opcode */
Sylvain "ythier" Hitier3093f8f2011-09-03 11:22:27 +0000497#define SST_SST25VF080_REMS 0x80 /* REMS or RES opcode, same as SST25LF080A */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000498#define SST_SST25VF080B 0x258E
499#define SST_SST25VF080B_REMS 0x8E /* REMS or RES opcode */
500#define SST_SST25VF016B 0x2541
501#define SST_SST25VF032B 0x254A
502#define SST_SST25VF032B_REMS 0x4A /* REMS or RES opcode */
503#define SST_SST25VF064C 0x254B
504#define SST_SST26VF016 0x2601
505#define SST_SST26VF032 0x2602
506#define SST_SST27SF512 0xA4
507#define SST_SST27SF010 0xA5
508#define SST_SST27SF020 0xA6
509#define SST_SST27VF010 0xA9
510#define SST_SST27VF020 0xAA
511#define SST_SST28SF040 0x04
512#define SST_SST29EE512 0x5D
513#define SST_SST29EE010 0x07
514#define SST_SST29LE010 0x08 /* Same as SST29VE010 */
515#define SST_SST29EE020A 0x10 /* Same as SST29EE020 */
516#define SST_SST29LE020 0x12 /* Same as SST29VE020 */
517#define SST_SST29SF020 0x24
518#define SST_SST29VF020 0x25
519#define SST_SST29SF040 0x13
520#define SST_SST29VF040 0x14
521#define SST_SST39SF512 0xB4
522#define SST_SST39SF010 0xB5
523#define SST_SST39SF020 0xB6 /* Same as 39SF020A */
524#define SST_SST39SF040 0xB7
525#define SST_SST39VF512 0xD4
526#define SST_SST39VF010 0xD5
527#define SST_SST39VF020 0xD6 /* Same as 39LF020 */
528#define SST_SST39VF040 0xD7 /* Same as 39LF040 */
529#define SST_SST39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */
530#define SST_SST49LF040B 0x50
531#define SST_SST49LF040 0x51
532#define SST_SST49LF020 0x61
533#define SST_SST49LF020A 0x52
534#define SST_SST49LF030A 0x1C
535#define SST_SST49LF080A 0x5B
536#define SST_SST49LF002A 0x57
537#define SST_SST49LF003A 0x1B
538#define SST_SST49LF004A 0x60 /* Same as 49LF004B */
539#define SST_SST49LF008A 0x5A
540#define SST_SST49LF004C 0x54
541#define SST_SST49LF008C 0x59
542#define SST_SST49LF016C 0x5C
543#define SST_SST49LF160C 0x4C
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000544
545/*
546 * ST25P chips are SPI, first byte of device ID is memory type, second
547 * byte of device ID is related to log(bitsize) at least for some chips.
548 */
Sylvain "ythier" Hitier3093f8f2011-09-03 11:22:27 +0000549#define ST_ID 0x20 /* ST / SGS/Thomson / Numonyx (later acquired by Micron) */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000550#define ST_M25P05A 0x2010
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000551#define ST_M25P05_RES 0x10 /* Same code as M25P10. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000552#define ST_M25P10A 0x2011
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000553#define ST_M25P10_RES 0x10 /* Same code as M25P05. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000554#define ST_M25P20 0x2012
555#define ST_M25P40 0x2013
556#define ST_M25P40_RES 0x12
557#define ST_M25P80 0x2014
558#define ST_M25P16 0x2015
559#define ST_M25P32 0x2016
560#define ST_M25P64 0x2017
561#define ST_M25P128 0x2018
Carl Worthd1dd72c2011-03-06 18:45:40 +0000562#define ST_M25PX16 0x7115
Jason Shriver4119e9b2010-09-14 13:16:01 +0000563#define ST_M25PX32 0x7116
564#define ST_M25PX64 0x7117
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000565#define ST_M25PE10 0x8011
566#define ST_M25PE20 0x8012
567#define ST_M25PE40 0x8013
568#define ST_M25PE80 0x8014
569#define ST_M25PE16 0x8015
570#define ST_M50FLW040A 0x08
571#define ST_M50FLW040B 0x28
572#define ST_M50FLW080A 0x80
573#define ST_M50FLW080B 0x81
574#define ST_M50FW002 0x29
575#define ST_M50FW040 0x2C
576#define ST_M50FW080 0x2D
577#define ST_M50FW016 0x2E
578#define ST_M50LPW116 0x30
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000579#define ST_M29F002B 0x34 /* Same as M29F002BB */
580#define ST_M29F002T 0xB0 /* Same as M29F002BT/M29F002NT/M29F002BNT */
581#define ST_M29F040B 0xE2 /* Same as M29F040 */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000582#define ST_M29F080 0xF1
583#define ST_M29F200BT 0xD3
584#define ST_M29F200BB 0xD4
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000585#define ST_M29F400BT 0xD5 /* Same as M29F400T */
586#define ST_M29F400BB 0xD6 /* Same as M29F400B */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000587#define ST_M29F800DB 0x58
588#define ST_M29F800DT 0xEC
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000589#define ST_M29W010B 0x23
590#define ST_M29W040B 0xE3
Jeffrey A. Kentba7c9222010-02-01 05:49:46 +0000591#define ST_M29W512B 0x27
Niklas Söderlundae4294f2012-04-14 21:04:03 +0000592#define ST_N25Q064 0xBA17
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000593
Mattias Mattsson4c066502010-07-29 20:01:13 +0000594#define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */
595#define MVC_V29C51000T 0x00
596#define MVC_V29C51400T 0x13
597#define MVC_V29LC51000 0x20
598#define MVC_V29LC51001 0x60
599#define MVC_V29LC51002 0x82
600#define MVC_V29C51000B 0xA0
601#define MVC_V29C51400B 0xB3
602#define SM_MVC_29C51001T 0x01 /* Identical chips: {F,S,V}29C51001T */
603#define SM_MVC_29C51002T 0x02 /* Identical chips: {F,S,V}29C51002T */
604#define SM_MVC_29C51004T 0x03 /* Identical chips: {F,S,V}29C51004T */
605#define SM_MVC_29C31004T 0x63 /* Identical chips: {S,V}29C31004T */
606#define SM_MVC_29C31004B 0x73 /* Identical chips: {S,V}29C31004B */
607#define SM_MVC_29C51001B 0xA1 /* Identical chips: {F,S,V}29C51001B */
608#define SM_MVC_29C51002B 0xA2 /* Identical chips: {F,S,V}29C51002B */
609#define SM_MVC_29C51004B 0xA3 /* Identical chips: {F,S,V}29C51004B */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000610
611#define TI_ID 0x97 /* Texas Instruments */
612#define TI_OLD_ID 0x01 /* TI chips from last century */
613#define TI_TMS29F002RT 0xB0
614#define TI_TMS29F002RB 0x34
615
616/*
617 * W25X chips are SPI, first byte of device ID is memory type, second
618 * byte of device ID is related to log(bitsize).
619 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000620#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flashes */
Mattias Mattssona745cf42010-09-14 23:56:56 +0000621#define WINBOND_NEX_W25X10 0x3011
622#define WINBOND_NEX_W25X20 0x3012
623#define WINBOND_NEX_W25X40 0x3013
624#define WINBOND_NEX_W25X80 0x3014
625#define WINBOND_NEX_W25X16 0x3015
626#define WINBOND_NEX_W25X32 0x3016
627#define WINBOND_NEX_W25X64 0x3017
628#define WINBOND_NEX_W25Q40 0x4013
629#define WINBOND_NEX_W25Q80 0x4014
630#define WINBOND_NEX_W25Q16 0x4015
631#define WINBOND_NEX_W25Q32 0x4016
632#define WINBOND_NEX_W25Q64 0x4017
633#define WINBOND_NEX_W25Q128 0x4018
634
635#define WINBOND_ID 0xDA /* Winbond */
636#define WINBOND_W19B160BB 0x49
637#define WINBOND_W19B160BT 0xC4
638#define WINBOND_W19B320SB 0x2A /* Same as W19L320SB */
639#define WINBOND_W19B320ST 0xBA /* Same as W19L320ST */
640#define WINBOND_W19B322MB 0x92
641#define WINBOND_W19B322MT 0x10
642#define WINBOND_W19B323MB 0x94
643#define WINBOND_W19B323MT 0x13
644#define WINBOND_W19B324MB 0x97
645#define WINBOND_W19B324MT 0x16
646#define WINBOND_W29C010 0xC1 /* Same as W29C010M, W29C011A, W29EE011, W29EE012, and ASD AE29F1008 */
647#define WINBOND_W29C020 0x45 /* Same as W29C020C, W29C022 and ASD AE29F2008 */
648#define WINBOND_W29C040 0x46 /* Same as W29C040P */
649#define WINBOND_W29C512A 0xC8 /* Same as W29EE512 */
650#define WINBOND_W39L010 0x31
651#define WINBOND_W39L020 0xB5
652#define WINBOND_W39L040 0xB6
653#define WINBOND_W39L040A 0xD6
654#define WINBOND_W39L512 0x38
655#define WINBOND_W39V040A 0x3D
656#define WINBOND_W39V040FA 0x34
657#define WINBOND_W39V040B 0x54 /* Same as W39V040FB */
658#define WINBOND_W39V040C 0x50 /* Same as W39V040FC */
659#define WINBOND_W39V080A 0xD0
660#define WINBOND_W39V080FA 0xD3
661#define WINBOND_W39V080FA_DM 0x93 /* W39V080FA dual mode */
662#define WINBOND_W49F002 0x25 /* Same as W49F002B */
663#define WINBOND_W49F002U 0x0B /* Same as W49F002N and ASD AE49F2008 */
664#define WINBOND_W49F020 0x8C
665#define WINBOND_W49V002A 0xB0
666#define WINBOND_W49V002FA 0x32
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000667
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000668#endif /* !FLASHCHIPS_H */