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Uwe Hermann34eae342009-09-02 23:27:45 +00001/*
2 * This file is part of the flashrom project.
3 *
Joerg Fischer4be25c72009-09-09 00:55:13 +00004 * Copyright (C) 2009 Joerg Fischer <turboj@web.de>
Uwe Hermann34eae342009-09-02 23:27:45 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Uwe Hermann34eae342009-09-02 23:27:45 +000015 */
16
17#include <stdlib.h>
Uwe Hermann34eae342009-09-02 23:27:45 +000018#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000019#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000020#include "hwaccess.h"
Uwe Hermann34eae342009-09-02 23:27:45 +000021
22#define PCI_VENDOR_ID_DRKAISER 0x1803
23
24#define PCI_MAGIC_DRKAISER_ADDR 0x50
25#define PCI_MAGIC_DRKAISER_VALUE 0xa971
26
David Hendricks8bb20212011-06-14 01:35:36 +000027#define DRKAISER_MEMMAP_SIZE (1024 * 128)
28
Carl-Daniel Hailfingerfb2c4c32010-07-17 22:42:33 +000029/* Mask to restrict flash accesses to the 128kB memory window. */
30#define DRKAISER_MEMMAP_MASK ((1 << 17) - 1)
31
Thomas Heijligencc853d82021-05-04 15:32:17 +020032static const struct dev_entry drkaiser_pcidev[] = {
Michael Karcher84486392010-02-24 00:04:40 +000033 {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000034
35 {0},
Uwe Hermann34eae342009-09-02 23:27:45 +000036};
37
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000038static uint8_t *drkaiser_bar;
Uwe Hermann34eae342009-09-02 23:27:45 +000039
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000040static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
41 chipaddr addr);
42static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
43 const chipaddr addr);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000044static const struct par_master par_master_drkaiser = {
Thomas Heijligen43040f22022-06-23 14:38:35 +020045 .chip_readb = drkaiser_chip_readb,
46 .chip_readw = fallback_chip_readw,
47 .chip_readl = fallback_chip_readl,
48 .chip_readn = fallback_chip_readn,
49 .chip_writeb = drkaiser_chip_writeb,
50 .chip_writew = fallback_chip_writew,
51 .chip_writel = fallback_chip_writel,
52 .chip_writen = fallback_chip_writen,
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000053};
54
Thomas Heijligencc853d82021-05-04 15:32:17 +020055static int drkaiser_init(void)
Uwe Hermann34eae342009-09-02 23:27:45 +000056{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000057 struct pci_dev *dev = NULL;
Uwe Hermann34eae342009-09-02 23:27:45 +000058 uint32_t addr;
59
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +000060 if (rget_io_perms())
61 return 1;
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +000062
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000063 dev = pcidev_init(drkaiser_pcidev, PCI_BASE_ADDRESS_2);
64 if (!dev)
65 return 1;
66
67 addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2);
Niklas Söderlund89edf362013-08-23 23:29:23 +000068 if (!addr)
69 return 1;
Uwe Hermann34eae342009-09-02 23:27:45 +000070
71 /* Write magic register to enable flash write. */
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000072 rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE);
Uwe Hermann34eae342009-09-02 23:27:45 +000073
Stefan Taunerc0aaf952011-05-19 02:58:17 +000074 /* Map 128kB flash memory window. */
Stefan Tauner7fb5aa02013-08-14 15:48:44 +000075 drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE);
76 if (drkaiser_bar == ERROR_PTR)
David Hendricks8bb20212011-06-14 01:35:36 +000077 return 1;
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000078
79 max_rom_decode.parallel = 128 * 1024;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000080 register_par_master(&par_master_drkaiser, BUS_PARALLEL);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000081
Uwe Hermann34eae342009-09-02 23:27:45 +000082 return 0;
83}
84
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000085static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
86 chipaddr addr)
Uwe Hermann34eae342009-09-02 23:27:45 +000087{
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +000088 pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
Uwe Hermann34eae342009-09-02 23:27:45 +000089}
90
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000091static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
92 const chipaddr addr)
Uwe Hermann34eae342009-09-02 23:27:45 +000093{
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +000094 return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
Uwe Hermann34eae342009-09-02 23:27:45 +000095}
Thomas Heijligencc853d82021-05-04 15:32:17 +020096
97const struct programmer_entry programmer_drkaiser = {
98 .name = "drkaiser",
99 .type = PCI,
100 .devs.dev = drkaiser_pcidev,
101 .init = drkaiser_init,
102 .map_flash_region = fallback_map,
103 .unmap_flash_region = fallback_unmap,
104 .delay = internal_delay,
105};