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Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +00004 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000014 */
15
16#include <stdio.h>
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000017#include <string.h>
18#include <stdlib.h>
19#include <ctype.h>
20#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000021#include "programmer.h"
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000022#include "spi.h"
23
Edward O'Callaghancbc5ba02021-01-06 14:10:52 +110024struct bitbang_spi_master_data {
25 const struct bitbang_spi_master *mst;
26};
27
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +000028/* Note that CS# is active low, so val=0 means the chip is active. */
Stefan Tauner67d163d2013-01-15 17:37:48 +000029static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000030{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000031 master->set_cs(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000032}
33
Stefan Tauner67d163d2013-01-15 17:37:48 +000034static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000035{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000036 master->set_sck(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000037}
38
Stefan Tauner67d163d2013-01-15 17:37:48 +000039static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000040{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000041 if (master->request_bus)
42 master->request_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000043}
44
Stefan Tauner67d163d2013-01-15 17:37:48 +000045static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000046{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000047 if (master->release_bus)
48 master->release_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000049}
50
Daniel Thompsonb623f402018-06-05 09:38:19 +010051static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi)
52{
53 if (master->set_sck_set_mosi) {
54 master->set_sck_set_mosi(sck, mosi);
55 return;
56 }
57
58 master->set_sck(sck);
59 master->set_mosi(mosi);
60}
61
62static int bitbang_spi_set_sck_get_miso(const struct bitbang_spi_master * const master, int sck)
63{
64 if (master->set_sck_get_miso)
65 return master->set_sck_get_miso(sck);
66
67 master->set_sck(sck);
68 return master->get_miso();
69}
70
Edward O'Callaghan5eca4272020-04-12 17:27:53 +100071static int bitbang_spi_send_command(const struct flashctx *flash,
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000072 unsigned int writecnt, unsigned int readcnt,
73 const unsigned char *writearr,
74 unsigned char *readarr);
Edward O'Callaghancbc5ba02021-01-06 14:10:52 +110075static int bitbang_spi_shutdown(void *data);
Michael Karcherb9dbe482011-05-11 17:07:07 +000076
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000077static const struct spi_master spi_master_bitbang = {
Nico Huber1cf407b2017-11-10 20:18:23 +010078 .features = SPI_MASTER_4BA,
Uwe Hermann91f4afa2011-07-28 08:13:25 +000079 .max_data_read = MAX_DATA_READ_UNLIMITED,
80 .max_data_write = MAX_DATA_WRITE_UNLIMITED,
81 .command = bitbang_spi_send_command,
82 .multicommand = default_spi_send_multicommand,
83 .read = default_spi_read,
84 .write_256 = default_spi_write_256,
Edward O'Callaghancbc5ba02021-01-06 14:10:52 +110085 .shutdown = bitbang_spi_shutdown,
Aarya Chaumal0cea7532022-07-04 18:21:50 +053086 .probe_opcode = default_spi_probe_opcode,
Michael Karcherb9dbe482011-05-11 17:07:07 +000087};
88
Edward O'Callaghancbc5ba02021-01-06 14:10:52 +110089static int bitbang_spi_shutdown(void *data)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000090{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000091 /* FIXME: Run bitbang_spi_release_bus here or per command? */
Edward O'Callaghancbc5ba02021-01-06 14:10:52 +110092 free(data);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000093 return 0;
94}
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000095
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000096int register_spi_bitbang_master(const struct bitbang_spi_master *master)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000097{
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000098 struct spi_master mst = spi_master_bitbang;
Nico Hubercb44eb72017-04-22 00:09:42 +020099 /* If someone forgot to initialize a bitbang function, we catch it here. */
100 if (!master || !master->set_cs ||
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000101 !master->set_sck || !master->set_mosi || !master->get_miso ||
102 (master->request_bus && !master->release_bus) ||
103 (!master->request_bus && master->release_bus)) {
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000104 msg_perr("Incomplete SPI bitbang master setting!\n"
Nico Huberac90af62022-12-18 00:22:47 +0000105 "Please report a bug at flashrom-stable@flashrom.org\n");
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000106 return ERROR_FLASHROM_BUG;
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000107 }
108
Edward O'Callaghancbc5ba02021-01-06 14:10:52 +1100109 struct bitbang_spi_master_data *data = calloc(1, sizeof(struct bitbang_spi_master_data));
110 if (!data) {
111 msg_perr("Out of memory!\n");
112 return ERROR_OOM;
113 }
114
115 data->mst = master;
116 register_spi_master(&mst, data);
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +0000117
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000118 /* Only mess with the bus if we're sure nobody else uses it. */
119 bitbang_spi_request_bus(master);
120 bitbang_spi_set_cs(master, 1);
Daniel Thompsonb623f402018-06-05 09:38:19 +0100121 bitbang_spi_set_sck_set_mosi(master, 0, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000122 /* FIXME: Release SPI bus here and request it again for each command or
123 * don't release it now and only release it on programmer shutdown?
124 */
125 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000126 return 0;
127}
128
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100129static uint8_t bitbang_spi_read_byte(const struct bitbang_spi_master *master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000130{
131 uint8_t ret = 0;
132 int i;
133
134 for (i = 7; i >= 0; i--) {
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100135 if (i == 0)
136 bitbang_spi_set_sck_set_mosi(master, 0, 0);
137 else
138 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000139 programmer_delay(master->half_period);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000140 ret <<= 1;
Daniel Thompsonb623f402018-06-05 09:38:19 +0100141 ret |= bitbang_spi_set_sck_get_miso(master, 1);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000142 programmer_delay(master->half_period);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000143 }
144 return ret;
145}
146
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100147static void bitbang_spi_write_byte(const struct bitbang_spi_master *master, uint8_t val)
148{
149 int i;
150
151 for (i = 7; i >= 0; i--) {
152 bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1);
153 programmer_delay(master->half_period);
154 bitbang_spi_set_sck(master, 1);
155 programmer_delay(master->half_period);
156 }
157}
158
Edward O'Callaghan5eca4272020-04-12 17:27:53 +1000159static int bitbang_spi_send_command(const struct flashctx *flash,
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000160 unsigned int writecnt, unsigned int readcnt,
161 const unsigned char *writearr,
162 unsigned char *readarr)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000163{
Nico Huber519be662018-12-23 20:03:35 +0100164 unsigned int i;
Edward O'Callaghancbc5ba02021-01-06 14:10:52 +1100165 const struct bitbang_spi_master_data *data = flash->mst->spi.data;
166 const struct bitbang_spi_master *master = data->mst;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000167
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000168 /* FIXME: Run bitbang_spi_request_bus here or in programmer init?
169 * Requesting and releasing the SPI bus is handled in here to allow the
170 * programmer to use its own SPI engine for native accesses.
171 */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000172 bitbang_spi_request_bus(master);
173 bitbang_spi_set_cs(master, 0);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000174 for (i = 0; i < writecnt; i++)
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100175 bitbang_spi_write_byte(master, writearr[i]);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000176 for (i = 0; i < readcnt; i++)
Daniel Thompson455a6fc2018-06-05 09:55:20 +0100177 readarr[i] = bitbang_spi_read_byte(master);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000178
Daniel Thompsonb623f402018-06-05 09:38:19 +0100179 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000180 programmer_delay(master->half_period);
181 bitbang_spi_set_cs(master, 1);
182 programmer_delay(master->half_period);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000183 /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000184 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000185
186 return 0;
187}