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Uwe Hermann515ab3d2009-05-15 17:02:34 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +00005 * Copyright (C) 2010, 2011 Carl-Daniel Hailfinger
Uwe Hermann515ab3d2009-05-15 17:02:34 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <stdlib.h>
23#include <string.h>
Uwe Hermann515ab3d2009-05-15 17:02:34 +000024#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000025#include "programmer.h"
Uwe Hermann515ab3d2009-05-15 17:02:34 +000026
27uint32_t io_base_addr;
28struct pci_access *pacc;
Uwe Hermann8403ccb2009-05-16 21:39:19 +000029struct pci_dev *pcidev_dev = NULL;
Uwe Hermann515ab3d2009-05-15 17:02:34 +000030
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +000031enum pci_bartype {
32 TYPE_MEMBAR,
33 TYPE_IOBAR,
34 TYPE_ROMBAR,
35 TYPE_UNKNOWN
36};
37
38uintptr_t pcidev_validate(struct pci_dev *dev, int bar,
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000039 const struct pcidev_status *devs)
Uwe Hermann515ab3d2009-05-15 17:02:34 +000040{
41 int i;
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +000042 uint64_t addr;
43 uint32_t upperaddr;
44 uint8_t headertype;
45 uint16_t supported_cycles;
46 enum pci_bartype bartype = TYPE_UNKNOWN;
Uwe Hermann515ab3d2009-05-15 17:02:34 +000047
48 for (i = 0; devs[i].device_name != NULL; i++) {
49 if (dev->device_id != devs[i].device_id)
50 continue;
51
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +000052 msg_pinfo("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n",
53 devs[i].vendor_name, devs[i].device_name,
54 dev->vendor_id, dev->device_id, dev->bus, dev->dev,
55 dev->func);
56
57 headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f;
58 msg_pspew("PCI header type 0x%02x\n", headertype);
59
Uwe Hermann2bc98f62009-09-30 18:29:55 +000060 /*
61 * Don't use dev->base_addr[x] (as value for 'bar'), won't
62 * work on older libpci.
63 */
Carl-Daniel Hailfinger295b3af2010-03-17 00:47:56 +000064 addr = pci_read_long(dev, bar);
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +000065
66 /* Sanity checks. */
67 switch (headertype) {
68 case PCI_HEADER_TYPE_NORMAL:
69 switch (bar) {
70 case PCI_BASE_ADDRESS_0:
71 case PCI_BASE_ADDRESS_1:
72 case PCI_BASE_ADDRESS_2:
73 case PCI_BASE_ADDRESS_3:
74 case PCI_BASE_ADDRESS_4:
75 case PCI_BASE_ADDRESS_5:
76 if ((addr & PCI_BASE_ADDRESS_SPACE) ==
77 PCI_BASE_ADDRESS_SPACE_IO)
78 bartype = TYPE_IOBAR;
79 else
80 bartype = TYPE_MEMBAR;
81 break;
82 case PCI_ROM_ADDRESS:
83 bartype = TYPE_ROMBAR;
84 break;
85 }
86 break;
87 case PCI_HEADER_TYPE_BRIDGE:
88 switch (bar) {
89 case PCI_BASE_ADDRESS_0:
90 case PCI_BASE_ADDRESS_1:
91 if ((addr & PCI_BASE_ADDRESS_SPACE) ==
92 PCI_BASE_ADDRESS_SPACE_IO)
93 bartype = TYPE_IOBAR;
94 else
95 bartype = TYPE_MEMBAR;
96 break;
97 case PCI_ROM_ADDRESS1:
98 bartype = TYPE_ROMBAR;
99 break;
100 }
101 break;
102 case PCI_HEADER_TYPE_CARDBUS:
103 break;
104 default:
105 msg_perr("Unknown PCI header type 0x%02x, BAR type "
106 "cannot be determined reliably.\n", headertype);
107 break;
108 }
109
110 supported_cycles = pci_read_word(dev, PCI_COMMAND);
111
112 msg_pdbg("Requested BAR is ");
113 switch (bartype) {
114 case TYPE_MEMBAR:
115 msg_pdbg("MEM");
116 if (!(supported_cycles & PCI_COMMAND_MEMORY)) {
117 msg_perr("MEM BAR access requested, but device "
118 "has MEM space accesses disabled.\n");
119 /* TODO: Abort here? */
120 }
Carl-Daniel Hailfinger295b3af2010-03-17 00:47:56 +0000121 msg_pdbg(", %sbit, %sprefetchable\n",
122 ((addr & 0x6) == 0x0) ? "32" :
123 (((addr & 0x6) == 0x4) ? "64" : "reserved"),
124 (addr & 0x8) ? "" : "not ");
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +0000125 if ((addr & 0x6) == 0x4) {
126 /* The spec says that a 64-bit register consumes
127 * two subsequent dword locations.
128 */
129 upperaddr = pci_read_long(dev, bar + 4);
130 if (upperaddr != 0x00000000) {
131 /* Fun! A real 64-bit resource. */
132 if (sizeof(uintptr_t) != sizeof(uint64_t)) {
133 msg_perr("BAR unreachable!");
134 /* TODO: Really abort here? If
135 * multiple PCI devices match,
136 * we might never tell the user
137 * about the other devices.
138 */
139 return 0;
140 }
141 addr |= (uint64_t)upperaddr << 32;
142 }
143 }
144 addr &= PCI_BASE_ADDRESS_MEM_MASK;
145 break;
146 case TYPE_IOBAR:
147 msg_pdbg("I/O\n");
148#if __FLASHROM_HAVE_OUTB__
149 if (!(supported_cycles & PCI_COMMAND_IO)) {
150 msg_perr("I/O BAR access requested, but device "
151 "has I/O space accesses disabled.\n");
152 /* TODO: Abort here? */
153 }
154#else
155 msg_perr("I/O BAR access requested, but flashrom does "
156 "not support I/O BAR access on this platform "
157 "(yet).\n");
158#endif
159 addr &= PCI_BASE_ADDRESS_IO_MASK;
160 break;
161 case TYPE_ROMBAR:
162 msg_pdbg("ROM\n");
163 /* Not sure if this check is needed. */
164 if (!(supported_cycles & PCI_COMMAND_MEMORY)) {
165 msg_perr("MEM BAR access requested, but device "
166 "has MEM space accesses disabled.\n");
167 /* TODO: Abort here? */
168 }
169 addr &= PCI_ROM_ADDRESS_MASK;
170 break;
171 case TYPE_UNKNOWN:
172 msg_perr("BAR type unknown, please report a bug at "
173 "flashrom@flashrom.org\n");
Carl-Daniel Hailfinger295b3af2010-03-17 00:47:56 +0000174 }
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +0000175
Michael Karcher84486392010-02-24 00:04:40 +0000176 if (devs[i].status == NT) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000177 msg_pinfo("===\nThis PCI device is UNTESTED. Please "
Paul Menzelab6328f2010-10-08 11:03:02 +0000178 "report the 'flashrom -p xxxx' output \n"
179 "to flashrom@flashrom.org if it works "
180 "for you. Please add the name of your\n"
181 "PCI device to the subject. Thank you for "
182 "your help!\n===\n");
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000183 }
184
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +0000185 return (uintptr_t)addr;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000186 }
187
188 return 0;
189}
190
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +0000191uintptr_t pcidev_init(uint16_t vendor_id, int bar,
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000192 const struct pcidev_status *devs)
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000193{
194 struct pci_dev *dev;
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +0000195 struct pci_filter filter;
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000196 char *pcidev_bdf;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000197 char *msg = NULL;
198 int found = 0;
Carl-Daniel Hailfinger8a19ef12011-02-15 22:44:27 +0000199 uintptr_t addr = 0, curaddr = 0;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000200
201 pacc = pci_alloc(); /* Get the pci_access structure */
202 pci_init(pacc); /* Initialize the PCI library */
203 pci_scan_bus(pacc); /* We want to get the list of devices */
204 pci_filter_init(pacc, &filter);
205
206 /* Filter by vendor and also bb:dd.f (if supplied by the user). */
207 filter.vendor = vendor_id;
Carl-Daniel Hailfinger2b6dcb32010-07-08 10:13:37 +0000208 pcidev_bdf = extract_programmer_param("pci");
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000209 if (pcidev_bdf != NULL) {
210 if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000211 msg_perr("Error: %s\n", msg);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000212 exit(1);
213 }
214 }
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000215 free(pcidev_bdf);
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000216
217 for (dev = pacc->devices; dev; dev = dev->next) {
218 if (pci_filter_match(&filter, dev)) {
TURBO Jb0912c02009-09-02 23:00:46 +0000219 if ((addr = pcidev_validate(dev, bar, devs)) != 0) {
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000220 curaddr = addr;
221 pcidev_dev = dev;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000222 found++;
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000223 }
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000224 }
225 }
226
227 /* Only continue if exactly one supported PCI dev has been found. */
228 if (found == 0) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000229 msg_perr("Error: No supported PCI device found.\n");
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000230 exit(1);
231 } else if (found > 1) {
Sean Nelson316a29f2010-05-07 20:09:04 +0000232 msg_perr("Error: Multiple supported PCI devices found. "
Carl-Daniel Hailfinger3e854422010-10-06 23:03:21 +0000233 "Use 'flashrom -p xxxx:pci=bb:dd.f' \n"
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000234 "to explicitly select the card with the given BDF "
235 "(PCI bus, device, function).\n");
236 exit(1);
237 }
238
Uwe Hermann8403ccb2009-05-16 21:39:19 +0000239 return curaddr;
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000240}
241
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +0000242void print_supported_pcidevs(const struct pcidev_status *devs)
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000243{
244 int i;
245
Carl-Daniel Hailfingera73fb492010-10-06 23:48:34 +0000246 msg_pinfo("PCI devices:\n");
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000247 for (i = 0; devs[i].vendor_name != NULL; i++) {
Carl-Daniel Hailfingeref697832010-10-07 22:21:45 +0000248 msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000249 devs[i].device_name, devs[i].vendor_id,
250 devs[i].device_id,
Michael Karcher84486392010-02-24 00:04:40 +0000251 (devs[i].status == NT) ? " (untested)" : "");
Uwe Hermann515ab3d2009-05-15 17:02:34 +0000252 }
253}
Carl-Daniel Hailfinger2bee8cf2010-11-10 15:25:18 +0000254
255enum pci_write_type {
256 pci_write_type_byte,
257 pci_write_type_word,
258 pci_write_type_long,
259};
260
261struct undo_pci_write_data {
262 struct pci_dev dev;
263 int reg;
264 enum pci_write_type type;
265 union {
266 uint8_t bytedata;
267 uint16_t worddata;
268 uint32_t longdata;
269 };
270};
271
272void undo_pci_write(void *p)
273{
274 struct undo_pci_write_data *data = p;
275 msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n",
276 data->dev.bus, data->dev.dev, data->dev.func, data->reg);
277 switch (data->type) {
278 case pci_write_type_byte:
279 pci_write_byte(&data->dev, data->reg, data->bytedata);
280 break;
281 case pci_write_type_word:
282 pci_write_word(&data->dev, data->reg, data->worddata);
283 break;
284 case pci_write_type_long:
285 pci_write_long(&data->dev, data->reg, data->longdata);
286 break;
287 }
288 /* p was allocated in register_undo_pci_write. */
289 free(p);
290}
291
292#define register_undo_pci_write(a, b, c) \
293{ \
294 struct undo_pci_write_data *undo_pci_write_data; \
295 undo_pci_write_data = malloc(sizeof(struct undo_pci_write_data)); \
296 undo_pci_write_data->dev = *a; \
297 undo_pci_write_data->reg = b; \
298 undo_pci_write_data->type = pci_write_type_##c; \
299 undo_pci_write_data->c##data = pci_read_##c(dev, reg); \
300 register_shutdown(undo_pci_write, undo_pci_write_data); \
301}
302
303#define register_undo_pci_write_byte(a, b) register_undo_pci_write(a, b, byte)
304#define register_undo_pci_write_word(a, b) register_undo_pci_write(a, b, word)
305#define register_undo_pci_write_long(a, b) register_undo_pci_write(a, b, long)
306
307int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data)
308{
309 register_undo_pci_write_byte(dev, reg);
310 return pci_write_byte(dev, reg, data);
311}
312
313int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data)
314{
315 register_undo_pci_write_word(dev, reg);
316 return pci_write_word(dev, reg, data);
317}
318
319int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data)
320{
321 register_undo_pci_write_long(dev, reg);
322 return pci_write_long(dev, reg, data);
323}