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Rudolf Marek525339c2009-05-17 19:46:43 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Uwe Hermanneaefb482009-05-17 22:57:34 +000018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Rudolf Marek525339c2009-05-17 19:46:43 +000019 */
20
21/* Datasheets can be found on http://www.siliconimage.com. Great thanks! */
22
23#include <stdlib.h>
24#include <string.h>
25#include <fcntl.h>
26#include <sys/types.h>
27#include <sys/stat.h>
28#include <errno.h>
29#include "flash.h"
30
31#define PCI_VENDOR_ID_SII 0x1095
32
33uint8_t *sii_bar;
34uint16_t id;
35
36struct pcidev_status satas_sii[] = {
Uwe Hermanne8ba5382009-05-22 11:37:27 +000037 {0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"},
38 {0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"},
39 {0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"},
40 {0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
41 {0x1095, 0x3512, PCI_NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
Uwe Hermanneaefb482009-05-17 22:57:34 +000042
Rudolf Marek525339c2009-05-17 19:46:43 +000043 {},
44};
45
46int satasii_init(void)
47{
48 uint32_t addr;
49 uint16_t reg_offset;
50
51 get_io_perms();
52
53 pcidev_init(PCI_VENDOR_ID_SII, satas_sii);
Rudolf Marek525339c2009-05-17 19:46:43 +000054 id = pcidev_dev->device_id;
55
56 if ((id == 0x3132) || (id == 0x3124)) {
Uwe Hermanneaefb482009-05-17 22:57:34 +000057 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_0) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000058 reg_offset = 0x70;
59 } else {
Uwe Hermanneaefb482009-05-17 22:57:34 +000060 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_5) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000061 reg_offset = 0x50;
62 }
63
Uwe Hermanneaefb482009-05-17 22:57:34 +000064 sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset;
Rudolf Marek525339c2009-05-17 19:46:43 +000065
Uwe Hermanneaefb482009-05-17 22:57:34 +000066 /* Check if ROM cycle are OK. */
Urja Rannikko211fa972009-05-31 21:35:10 +000067 if ((id != 0x0680) && (!(mmio_readl(sii_bar) & (1 << 26))))
Uwe Hermannb2f7a2f2009-05-20 17:09:43 +000068 printf("Warning: Flash seems unconnected.\n");
Rudolf Marek525339c2009-05-17 19:46:43 +000069
Carl-Daniel Hailfingerb22918c2009-06-01 02:08:58 +000070 buses_supported = CHIP_BUSTYPE_PARALLEL;
71
Rudolf Marek525339c2009-05-17 19:46:43 +000072 return 0;
73}
74
75int satasii_shutdown(void)
76{
Rudolf Marek525339c2009-05-17 19:46:43 +000077 free(pcidev_bdf);
78 pci_cleanup(pacc);
79#if defined(__FreeBSD__) || defined(__DragonFly__)
80 close(io_fd);
81#endif
82 return 0;
83}
84
Rudolf Marek525339c2009-05-17 19:46:43 +000085void satasii_chip_writeb(uint8_t val, chipaddr addr)
86{
Uwe Hermanneaefb482009-05-17 22:57:34 +000087 uint32_t ctrl_reg, data_reg;
Rudolf Marek525339c2009-05-17 19:46:43 +000088
89 while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
90
Uwe Hermanneaefb482009-05-17 22:57:34 +000091 /* Mask out unused/reserved bits, set writes and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +000092 ctrl_reg &= 0xfcf80000;
93 ctrl_reg |= (1 << 25) | (0 << 24) | ((uint32_t) addr & 0x7ffff);
94
Uwe Hermanneaefb482009-05-17 22:57:34 +000095 data_reg = (mmio_readl((sii_bar + 4)) & ~0xff) | val;
96 mmio_writel(data_reg, (sii_bar + 4));
Rudolf Marek525339c2009-05-17 19:46:43 +000097 mmio_writel(ctrl_reg, sii_bar);
98
99 while (mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000100}
101
102uint8_t satasii_chip_readb(const chipaddr addr)
103{
104 uint32_t ctrl_reg;
105
106 while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
107
Uwe Hermanneaefb482009-05-17 22:57:34 +0000108 /* Mask out unused/reserved bits, set reads and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +0000109 ctrl_reg &= 0xfcf80000;
110 ctrl_reg |= (1 << 25) | (1 << 24) | ((uint32_t) addr & 0x7ffff);
111
112 mmio_writel(ctrl_reg, sii_bar);
113
Uwe Hermanneaefb482009-05-17 22:57:34 +0000114 while (mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000115
116 return (mmio_readl(sii_bar + 4)) & 0xff;
117}