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Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2007 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
Mats Erik Andersson44e1a192008-09-26 13:19:02 +000022 * EN29F512 has 1C,21
23 * EN29F010 has 1C,20
24 * EN29F040A has 1C,04
25 * EN29LV010 has 1C,6E and uses short F0 reset sequence
26 * EN29LV040(A) has 1C,4F and uses short F0 reset sequence
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000027 */
Mats Erik Andersson44e1a192008-09-26 13:19:02 +000028
Mats Erik Andersson44e1a192008-09-26 13:19:02 +000029#include "flash.h"
30
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000031int probe_en29f512(struct flashchip *flash)
32{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000033 chipaddr bios = flash->virtual_memory;
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000034 uint8_t id1, id2;
35
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000036 chip_writeb(0xAA, bios + 0x555);
37 chip_writeb(0x55, bios + 0x2AA);
38 chip_writeb(0x90, bios + 0x555);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000039
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000040 programmer_delay(10);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000041
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000042 id1 = chip_readb(bios + 0x100);
43 id2 = chip_readb(bios + 0x101);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000044
45 /* exit by writing F0 anywhere? or the code below */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000046 chip_writeb(0xAA, bios + 0x555);
47 chip_writeb(0x55, bios + 0x2AA);
48 chip_writeb(0xF0, bios + 0x555);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000049
Uwe Hermann04aa59a2009-09-02 22:09:00 +000050 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000051
52 if (id1 == flash->manufacture_id && id2 == flash->model_id)
53 return 1;
54
55 return 0;
56}
57
58/*
Mats Erik Andersson44e1a192008-09-26 13:19:02 +000059 * EN29F002AT has 1C,92
60 * EN29F002AB has 1C,97
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000061 */
Mats Erik Andersson44e1a192008-09-26 13:19:02 +000062
63/* This does not seem to function properly for EN29F002NT. */
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000064int probe_en29f002a(struct flashchip *flash)
65{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000066 chipaddr bios = flash->virtual_memory;
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000067 uint8_t id1, id2;
68
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000069 chip_writeb(0xAA, bios + 0x555);
70 chip_writeb(0x55, bios + 0xAAA);
71 chip_writeb(0x90, bios + 0x555);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000072
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000073 programmer_delay(10);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000074
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000075 id1 = chip_readb(bios + 0x100);
76 id2 = chip_readb(bios + 0x101);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000077
78 /* exit by writing F0 anywhere? or the code below */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000079 chip_writeb(0xAA, bios + 0x555);
80 chip_writeb(0x55, bios + 0xAAA);
81 chip_writeb(0xF0, bios + 0x555);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000082
Uwe Hermann04aa59a2009-09-02 22:09:00 +000083 printf_debug("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000084
85 if (id1 == flash->manufacture_id && id2 == flash->model_id)
86 return 1;
87
88 return 0;
89}
90
Mats Erik Andersson44e1a192008-09-26 13:19:02 +000091/* The EN29F002 chip needs repeated single byte writing, no block writing. */
92int write_en29f002a(struct flashchip *flash, uint8_t *buf)
93{
94 int i;
95 int total_size = flash->total_size * 1024;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000096 chipaddr bios = flash->virtual_memory;
97 chipaddr dst = bios;
Mats Erik Andersson44e1a192008-09-26 13:19:02 +000098
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000099 //chip_writeb(0xF0, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000100 programmer_delay(10);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000101 if (erase_chip_jedec(flash)) {
102 fprintf(stderr, "ERASE FAILED!\n");
103 return -1;
104 }
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000105
106 printf("Programming page: ");
107 for (i = 0; i < total_size; i++) {
108 /* write to the sector */
109 if ((i & 0xfff) == 0)
110 printf("address: 0x%08lx", (unsigned long)i);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000111 chip_writeb(0xAA, bios + 0x5555);
112 chip_writeb(0x55, bios + 0x2AAA);
113 chip_writeb(0xA0, bios + 0x5555);
114 chip_writeb(*buf++, dst++);
Mats Erik Andersson44e1a192008-09-26 13:19:02 +0000115
116 /* wait for Toggle bit ready */
117 toggle_ready_jedec(dst);
118
119 if ((i & 0xfff) == 0)
120 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
121 }
122
123 printf("\n");
124 return 0;
125}