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Uwe Hermann34eae342009-09-02 23:27:45 +00001/*
2 * This file is part of the flashrom project.
3 *
Joerg Fischer4be25c72009-09-09 00:55:13 +00004 * Copyright (C) 2009 Joerg Fischer <turboj@web.de>
Uwe Hermann34eae342009-09-02 23:27:45 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <stdlib.h>
Uwe Hermann34eae342009-09-02 23:27:45 +000022#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000023#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000024#include "hwaccess.h"
Uwe Hermann34eae342009-09-02 23:27:45 +000025
26#define PCI_VENDOR_ID_DRKAISER 0x1803
27
28#define PCI_MAGIC_DRKAISER_ADDR 0x50
29#define PCI_MAGIC_DRKAISER_VALUE 0xa971
30
David Hendricks8bb20212011-06-14 01:35:36 +000031#define DRKAISER_MEMMAP_SIZE (1024 * 128)
32
Carl-Daniel Hailfingerfb2c4c32010-07-17 22:42:33 +000033/* Mask to restrict flash accesses to the 128kB memory window. */
34#define DRKAISER_MEMMAP_MASK ((1 << 17) - 1)
35
Stefan Tauner4b24a2d2012-12-27 18:40:36 +000036const struct dev_entry drkaiser_pcidev[] = {
Michael Karcher84486392010-02-24 00:04:40 +000037 {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000038
39 {0},
Uwe Hermann34eae342009-09-02 23:27:45 +000040};
41
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000042static uint8_t *drkaiser_bar;
Uwe Hermann34eae342009-09-02 23:27:45 +000043
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000044static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
45 chipaddr addr);
46static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
47 const chipaddr addr);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000048static const struct par_programmer par_programmer_drkaiser = {
49 .chip_readb = drkaiser_chip_readb,
50 .chip_readw = fallback_chip_readw,
51 .chip_readl = fallback_chip_readl,
52 .chip_readn = fallback_chip_readn,
53 .chip_writeb = drkaiser_chip_writeb,
54 .chip_writew = fallback_chip_writew,
55 .chip_writel = fallback_chip_writel,
56 .chip_writen = fallback_chip_writen,
57};
58
Uwe Hermann34eae342009-09-02 23:27:45 +000059int drkaiser_init(void)
60{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000061 struct pci_dev *dev = NULL;
Uwe Hermann34eae342009-09-02 23:27:45 +000062 uint32_t addr;
63
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +000064 if (rget_io_perms())
65 return 1;
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +000066
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000067 dev = pcidev_init(drkaiser_pcidev, PCI_BASE_ADDRESS_2);
68 if (!dev)
69 return 1;
70
71 addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2);
Niklas Söderlund89edf362013-08-23 23:29:23 +000072 if (!addr)
73 return 1;
Uwe Hermann34eae342009-09-02 23:27:45 +000074
75 /* Write magic register to enable flash write. */
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000076 rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE);
Uwe Hermann34eae342009-09-02 23:27:45 +000077
Stefan Taunerc0aaf952011-05-19 02:58:17 +000078 /* Map 128kB flash memory window. */
Stefan Tauner7fb5aa02013-08-14 15:48:44 +000079 drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE);
80 if (drkaiser_bar == ERROR_PTR)
David Hendricks8bb20212011-06-14 01:35:36 +000081 return 1;
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000082
83 max_rom_decode.parallel = 128 * 1024;
84 register_par_programmer(&par_programmer_drkaiser, BUS_PARALLEL);
85
Uwe Hermann34eae342009-09-02 23:27:45 +000086 return 0;
87}
88
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000089static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
90 chipaddr addr)
Uwe Hermann34eae342009-09-02 23:27:45 +000091{
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +000092 pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
Uwe Hermann34eae342009-09-02 23:27:45 +000093}
94
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000095static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
96 const chipaddr addr)
Uwe Hermann34eae342009-09-02 23:27:45 +000097{
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +000098 return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
Uwe Hermann34eae342009-09-02 23:27:45 +000099}