blob: 0b27a6701516be900ad46470bd76c3c658bdefbc [file] [log] [blame]
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfinger5824fbf2010-05-21 23:09:42 +00004 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <stdio.h>
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000021#include <string.h>
22#include <stdlib.h>
23#include <ctype.h>
24#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000025#include "programmer.h"
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000026#include "spi.h"
27
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +000028/* Note that CS# is active low, so val=0 means the chip is active. */
Stefan Tauner67d163d2013-01-15 17:37:48 +000029static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000030{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000031 master->set_cs(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000032}
33
Stefan Tauner67d163d2013-01-15 17:37:48 +000034static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000035{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000036 master->set_sck(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000037}
38
Stefan Tauner67d163d2013-01-15 17:37:48 +000039static void bitbang_spi_set_mosi(const struct bitbang_spi_master * const master, int val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000040{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000041 master->set_mosi(val);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000042}
43
Stefan Tauner67d163d2013-01-15 17:37:48 +000044static int bitbang_spi_get_miso(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000045{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000046 return master->get_miso();
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000047}
48
Stefan Tauner67d163d2013-01-15 17:37:48 +000049static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000050{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000051 if (master->request_bus)
52 master->request_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000053}
54
Stefan Tauner67d163d2013-01-15 17:37:48 +000055static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master)
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000056{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000057 if (master->release_bus)
58 master->release_bus();
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000059}
60
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000061static int bitbang_spi_send_command(struct flashctx *flash,
62 unsigned int writecnt, unsigned int readcnt,
63 const unsigned char *writearr,
64 unsigned char *readarr);
Michael Karcherb9dbe482011-05-11 17:07:07 +000065
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000066static const struct spi_master spi_master_bitbang = {
Uwe Hermann91f4afa2011-07-28 08:13:25 +000067 .type = SPI_CONTROLLER_BITBANG,
68 .max_data_read = MAX_DATA_READ_UNLIMITED,
69 .max_data_write = MAX_DATA_WRITE_UNLIMITED,
70 .command = bitbang_spi_send_command,
71 .multicommand = default_spi_send_multicommand,
72 .read = default_spi_read,
73 .write_256 = default_spi_write_256,
Nico Huber7bca1262012-06-15 22:28:12 +000074 .write_aai = default_spi_write_aai,
Michael Karcherb9dbe482011-05-11 17:07:07 +000075};
76
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000077#if 0 // until it is needed
78static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +000079{
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000080 /* FIXME: Run bitbang_spi_release_bus here or per command? */
81 return 0;
82}
83#endif
84
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000085int register_spi_bitbang_master(const struct bitbang_spi_master *master)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000086{
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000087 struct spi_master mst = spi_master_bitbang;
Carl-Daniel Hailfinger17e23ac2010-07-18 14:42:28 +000088 /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
89 * we catch it here. Same goes for missing initialization of bitbanging
90 * functions.
91 */
92 if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000093 !master->set_sck || !master->set_mosi || !master->get_miso ||
94 (master->request_bus && !master->release_bus) ||
95 (!master->request_bus && master->release_bus)) {
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000096 msg_perr("Incomplete SPI bitbang master setting!\n"
97 "Please report a bug at flashrom@flashrom.org\n");
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +000098 return ERROR_FLASHROM_BUG;
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +000099 }
100
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000101 mst.data = master;
102 register_spi_master(&mst);
Carl-Daniel Hailfinger0d974e72010-07-17 12:54:09 +0000103
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000104 /* Only mess with the bus if we're sure nobody else uses it. */
105 bitbang_spi_request_bus(master);
106 bitbang_spi_set_cs(master, 1);
107 bitbang_spi_set_sck(master, 0);
108 bitbang_spi_set_mosi(master, 0);
109 /* FIXME: Release SPI bus here and request it again for each command or
110 * don't release it now and only release it on programmer shutdown?
111 */
112 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000113 return 0;
114}
115
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000116static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master,
117 uint8_t val)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000118{
119 uint8_t ret = 0;
120 int i;
121
122 for (i = 7; i >= 0; i--) {
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000123 bitbang_spi_set_mosi(master, (val >> i) & 1);
124 programmer_delay(master->half_period);
125 bitbang_spi_set_sck(master, 1);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000126 ret <<= 1;
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000127 ret |= bitbang_spi_get_miso(master);
128 programmer_delay(master->half_period);
129 bitbang_spi_set_sck(master, 0);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000130 }
131 return ret;
132}
133
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000134static int bitbang_spi_send_command(struct flashctx *flash,
135 unsigned int writecnt, unsigned int readcnt,
136 const unsigned char *writearr,
137 unsigned char *readarr)
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000138{
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000139 int i;
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +0000140 const struct bitbang_spi_master *master = flash->mst->spi.data;
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000141
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000142 /* FIXME: Run bitbang_spi_request_bus here or in programmer init?
143 * Requesting and releasing the SPI bus is handled in here to allow the
144 * programmer to use its own SPI engine for native accesses.
145 */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000146 bitbang_spi_request_bus(master);
147 bitbang_spi_set_cs(master, 0);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000148 for (i = 0; i < writecnt; i++)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000149 bitbang_spi_rw_byte(master, writearr[i]);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000150 for (i = 0; i < readcnt; i++)
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000151 readarr[i] = bitbang_spi_rw_byte(master, 0);
Michael Karcher1a854fc2010-07-17 10:42:34 +0000152
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000153 programmer_delay(master->half_period);
154 bitbang_spi_set_cs(master, 1);
155 programmer_delay(master->half_period);
Carl-Daniel Hailfinger28228882010-09-15 00:17:37 +0000156 /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000157 bitbang_spi_release_bus(master);
Carl-Daniel Hailfinger547872b2009-09-28 13:15:16 +0000158
159 return 0;
160}