blob: f7b27cb70d4ef10633b68ed032c89cdac975d386 [file] [log] [blame]
Kyösti Mälkki72d42f82014-06-01 23:48:31 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2011 Carl-Daniel Hailfinger
5 * Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000015 */
16
17#include <stdlib.h>
18#include "flash.h"
19#include "programmer.h"
20#include "hwaccess.h"
Thomas Heijligend96c97c2021-11-02 21:03:00 +010021#include "platform/pci.h"
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000022
23static uint8_t *it8212_bar = NULL;
24
25#define PCI_VENDOR_ID_ITE 0x1283
26
Thomas Heijligencc853d82021-05-04 15:32:17 +020027static const struct dev_entry devs_it8212[] = {
Stefan Tauner6697f712014-08-06 15:09:15 +000028 {PCI_VENDOR_ID_ITE, 0x8212, NT, "ITE", "8212F PATA RAID"},
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000029
Evgeny Zinoviev83c56b82019-11-05 17:47:43 +030030 {0},
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000031};
32
33#define IT8212_MEMMAP_SIZE (128 * 1024)
34#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1)
35
36static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
37static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000038static const struct par_master par_master_it8212 = {
Thomas Heijligen43040f22022-06-23 14:38:35 +020039 .chip_readb = it8212_chip_readb,
40 .chip_readw = fallback_chip_readw,
41 .chip_readl = fallback_chip_readl,
42 .chip_readn = fallback_chip_readn,
43 .chip_writeb = it8212_chip_writeb,
44 .chip_writew = fallback_chip_writew,
45 .chip_writel = fallback_chip_writel,
46 .chip_writen = fallback_chip_writen,
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000047};
48
Thomas Heijligencc853d82021-05-04 15:32:17 +020049static int it8212_init(void)
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000050{
51 if (rget_io_perms())
52 return 1;
53
54 struct pci_dev *dev = pcidev_init(devs_it8212, PCI_ROM_ADDRESS);
55 if (!dev)
56 return 1;
57
58 /* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */
Stefan Tauner0ccec8f2014-06-01 23:49:03 +000059 uint32_t io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE;
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000060 if (!io_base_addr)
61 return 1;
62
63 it8212_bar = rphysmap("IT8212F flash", io_base_addr, IT8212_MEMMAP_SIZE);
64 if (it8212_bar == ERROR_PTR)
65 return 1;
66
67 /* Restore ROM BAR decode state automatically at shutdown. */
68 rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
69
70 max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
Anastasia Klimchukc1f2a472021-08-27 15:47:46 +100071 return register_par_master(&par_master_it8212, BUS_PARALLEL, NULL);
Kyösti Mälkki72d42f82014-06-01 23:48:31 +000072}
73
74static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
75{
76 pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK));
77}
78
79static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr)
80{
81 return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK));
82}
Thomas Heijligencc853d82021-05-04 15:32:17 +020083
84const struct programmer_entry programmer_it8212 = {
85 .name = "it8212",
86 .type = PCI,
87 .devs.dev = devs_it8212,
88 .init = it8212_init,
89 .map_flash_region = fallback_map,
90 .unmap_flash_region = fallback_unmap,
91 .delay = internal_delay,
92};