blob: f68121a6b9a0d19cda5e474c60fb7e1ae8817967 [file] [log] [blame]
Kyösti Mälkki72d42f82014-06-01 23:48:31 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2011 Carl-Daniel Hailfinger
5 * Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <stdlib.h>
22#include "flash.h"
23#include "programmer.h"
24#include "hwaccess.h"
25
26static uint8_t *it8212_bar = NULL;
27
28#define PCI_VENDOR_ID_ITE 0x1283
29
30const struct dev_entry devs_it8212[] = {
31 {PCI_VENDOR_ID_ITE, 0x8212, OK, "ITE", "8212F PATA RAID"},
32
33 {},
34};
35
36#define IT8212_MEMMAP_SIZE (128 * 1024)
37#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1)
38
39static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
40static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr);
41static const struct par_programmer par_programmer_it8212 = {
42 .chip_readb = it8212_chip_readb,
43 .chip_readw = fallback_chip_readw,
44 .chip_readl = fallback_chip_readl,
45 .chip_readn = fallback_chip_readn,
46 .chip_writeb = it8212_chip_writeb,
47 .chip_writew = fallback_chip_writew,
48 .chip_writel = fallback_chip_writel,
49 .chip_writen = fallback_chip_writen,
50};
51
52int it8212_init(void)
53{
54 if (rget_io_perms())
55 return 1;
56
57 struct pci_dev *dev = pcidev_init(devs_it8212, PCI_ROM_ADDRESS);
58 if (!dev)
59 return 1;
60
61 /* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */
62 io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE;
63 if (!io_base_addr)
64 return 1;
65
66 it8212_bar = rphysmap("IT8212F flash", io_base_addr, IT8212_MEMMAP_SIZE);
67 if (it8212_bar == ERROR_PTR)
68 return 1;
69
70 /* Restore ROM BAR decode state automatically at shutdown. */
71 rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
72
73 max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
74 register_par_programmer(&par_programmer_it8212, BUS_PARALLEL);
75 return 0;
76}
77
78static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
79{
80 pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK));
81}
82
83static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr)
84{
85 return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK));
86}