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Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __FLASHCHIPS_H__
25#define __FLASHCHIPS_H__ 1
26
27/*
28 * Please keep this list sorted alphabetically by manufacturer. The first
29 * entry of each section should be the manufacturer ID, followed by the
30 * list of devices from that manufacturer (sorted by device IDs).
31 *
32 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
33 * continuation code.
34 * SPI parts have 16-bit device IDs if they support RDID.
35 */
36
37#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
38
39#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
40
41#define AMD_ID 0x01 /* AMD */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000042#define AM_29DL400BT 0x0C
43#define AM_29DL400BB 0x0F
44#define AM_29DL800BT 0x4A
45#define AM_29DL800BB 0xCB
46#define AM_29F002BB 0x34 /* Same as Am29F002NBB */
47#define AM_29F002BT 0xB0 /* Same as Am29F002NBT */
48#define AM_29F004BB 0x7B
49#define AM_29F004BT 0x77
50#define AM_29F016D 0xAD
Uwe Hermanna8b37272009-06-19 15:54:39 +000051#define AM_29F010B 0x20 /* Same as Am29F010A */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000052#define AM_29F040B 0xA4
53#define AM_29F080B 0xD5
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000054#define AM_29F200BB 0x57
55#define AM_29F200BT 0x51
56#define AM_29F400BB 0xAB
57#define AM_29F400BT 0x23
58#define AM_29F800BB 0x58
59#define AM_29F800BT 0xD6
60#define AM_29LV002BB 0xC2
61#define AM_29LV002BT 0x40
62#define AM_29LV004BB 0xB6
63#define AM_29LV004BT 0xB5
64#define AM_29LV008BB 0x37
65#define AM_29LV008BT 0x3E
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000066#define AM_29LV040B 0x4F
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000067#define AM_29LV080B 0x38 /* Same as Am29LV081B */
68#define AM_29LV200BB 0xBF
69#define AM_29LV200BT 0x3B
70#define AM_29LV800BB 0x5B /* Same as Am29LV800DB */
71#define AM_29LV400BT 0xB9
72#define AM_29LV400BB 0xBA
73#define AM_29LV800BT 0xDA /* Same as Am29LV800DT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000074
75#define AMIC_ID 0x7F37 /* AMIC */
76#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
77#define AMIC_A25L40P 0x2013
78#define AMIC_A29002B 0x0d
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000079#define AMIC_A29002T 0x8C /* Same as A290021T */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000080#define AMIC_A29040B 0x86
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +000081#define AMIC_A29400T 0xB0 /* Same as 294001T */
82#define AMIC_A29400U 0x31 /* Same as A294001U */
83#define AMIC_A29800T 0x0E
84#define AMIC_A29800U 0x8F
85#define AMIC_A29L004T 0x34 /* Same as A29L400T */
86#define AMIC_A29L004U 0xB5 /* Same as A29L400U */
87#define AMIC_A29L008T 0x1A /* Same as A29L800T */
88#define AMIC_A29L008U 0x9B /* Same as A29L800U */
89#define AMIC_A29L040 0x92
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000090#define AMIC_A49LF040A 0x9d
91
92/* This chip vendor/device ID is probably a misinterpreted LHA header. */
93#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
94#define ASD_AE49F2008 0x52
95
96#define ATMEL_ID 0x1F /* Atmel */
97#define AT_25DF021 0x4300
98#define AT_25DF041A 0x4401
99#define AT_25DF081 0x4502
100#define AT_25DF161 0x4602
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000101#define AT_25DF321 0x4700 /* Same as 26DF321 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000102#define AT_25DF321A 0x4701
103#define AT_25DF641 0x4800
104#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
105#define AT_25F512B 0x6500
106#define AT_25FS010 0x6601
107#define AT_25FS040 0x6604
108#define AT_26DF041 0x4400
109#define AT_26DF081 0x4500 /* guessed, no datasheet available */
110#define AT_26DF081A 0x4501
111#define AT_26DF161 0x4600
112#define AT_26DF161A 0x4601
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000113#define AT_26DF321 0x4700 /* Same as 25DF321 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000114#define AT_26F004 0x0400
115#define AT_29C040A 0xA4
116#define AT_29C010A 0xD5
117#define AT_29C020 0xDA
118#define AT_29C512 0x5D
119#define AT_45BR3214B /* No ID available */
120#define AT_45CS1282 0x2920
121#define AT_45D011 /* No ID available */
122#define AT_45D021A /* No ID available */
123#define AT_45D041A /* No ID available */
124#define AT_45D081A /* No ID available */
125#define AT_45D161 /* No ID available */
126#define AT_45DB011 /* No ID available */
127#define AT_45DB011B /* No ID available */
128#define AT_45DB011D 0x2200
129#define AT_45DB021A /* No ID available */
130#define AT_45DB021B /* No ID available */
131#define AT_45DB021D 0x2300
132#define AT_45DB041A /* No ID available */
133#define AT_45DB041D 0x2400
134#define AT_45DB081A /* No ID available */
135#define AT_45DB081D 0x2500
136#define AT_45DB161 /* No ID available */
137#define AT_45DB161B /* No ID available */
138#define AT_45DB161D 0x2600
139#define AT_45DB321 /* No ID available */
140#define AT_45DB321B /* No ID available */
141#define AT_45DB321C 0x2700
142#define AT_45DB321D 0x2701 /* Buggy data sheet */
143#define AT_45DB642 /* No ID available */
144#define AT_45DB642D 0x2800
145#define AT_49BV512 0x03
146#define AT_49F002N 0x07 /* for AT49F002(N) */
147#define AT_49F002NT 0x08 /* for AT49F002(N)T */
148
149#define CATALYST_ID 0x31 /* Catalyst */
150
151#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
152#define EMST_F49B002UA 0x00
153
154/*
155 * EN25 chips are SPI, first byte of device ID is memory type,
156 * second byte of device ID is log(bitsize)-9.
157 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
158 * is the continuation code for IDs in bank 2.
159 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
160 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
161 * Let's hope they are not manufacturing SPI flash chips as well.
162 */
163#define EON_ID 0x7F1C /* EON Silicon Devices */
164#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000165#define EN_25B05 0x2010 /* Same as P05, 2^19 kbit or 2^16 kByte */
166#define EN_25B10 0x2011 /* Same as P10 */
167#define EN_25B20 0x2012 /* Same as P20 */
168#define EN_25B40 0x2013 /* Same as P40 */
169#define EN_25B80 0x2014 /* Same as P80 */
170#define EN_25B16 0x2015 /* Same as P16 */
171#define EN_25B32 0x2016 /* Same as P32 */
172#define EN_25B64 0x2017 /* Same as P64 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000173#define EN_25D16 0x3015
174#define EN_25F05 0x3110
175#define EN_25F10 0x3111
176#define EN_25F20 0x3112
177#define EN_25F40 0x3113
178#define EN_25F80 0x3114
179#define EN_25F16 0x3115
180#define EN_25F32 0x3116
181#define EN_29F512 0x7F21
182#define EN_29F010 0x7F20
183#define EN_29F040A 0x7F04
184#define EN_29LV010 0x7F6E
185#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000186#define EN_29F002T 0x7F92 /* Same as EN29F002A */
187#define EN_29F002B 0x7F97 /* Same as EN29F002AN */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000188
189#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000190#define MBM29DL400BC 0x0F
191#define MBM29DL400TC 0x0C
192#define MBM29DL800BA 0xCB
193#define MBM29DL800TA 0x4A
194#define MBM29F002BC 0x34
195#define MBM29F002TC 0xB0
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000196#define MBM29F004BC 0x7B
197#define MBM29F004TC 0x77
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000198#define MBM29F040C 0xA4
199#define MBM29F080A 0xD5
200#define MBM29F200BC 0x57
201#define MBM29F200TC 0x51
202#define MBM29F400BC 0xAB
203#define MBM29F400TC 0x23
204#define MBM29F800BA 0x58
205#define MBM29F800TA 0xD6
206#define MBM29LV002BC 0xC2
207#define MBM29LV002TC 0x40
208#define MBM29LV004BC 0xB6
209#define MBM29LV004TC 0xB5
210#define MBM29LV008BA 0x37
211#define MBM29LV008TA 0x3E
212#define MBM29LV080A 0x38
213#define MBM29LV200BC 0xBF
214#define MBM29LV200TC 0x3B
215#define MBM29LV400BC 0xBA
216#define MBM29LV400TC 0xB9
217#define MBM29LV800BA 0x5B /* Same as MBM29LV800BE */
218#define MBM29LV800TA 0xDA /* Same as MBM29LV800TE */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000219
220#define HYUNDAI_ID 0xAD /* Hyundai */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000221#define HY_29F400T 0x23 /* Same as HY_29F400AT */
222#define HY_29F800B 0x58 /* Same as HY_29F800AB */
223#define HY_29LV800B 0x5B
224#define HY_29F040A 0xA4
225#define HY_29F400B 0xAB /* Same as HY_29F400AB */
226#define HY_29F002 0xB0
227#define HY_29LV400T 0xB9
228#define HY_29LV400B 0xBA
229#define HY_29F080 0xD5
230#define HY_29F800T 0xD6 /* Same as HY_29F800AT */
231#define HY_29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000232
233#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
234#define IM_29F004B 0xAE
235#define IM_29F004T 0xAF
236
237#define INTEL_ID 0x89 /* Intel */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000238#define I_82802AB 0xAD
239#define I_82802AC 0xAC
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000240#define P28F001BXT 0x94 /* 28F001BX-T */
241#define P28F001BXB 0x95 /* 28F001BX-B */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000242#define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */
243#define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000244
245#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
246
247/*
248 * MX25 chips are SPI, first byte of device ID is memory type,
249 * second byte of device ID is log(bitsize)-9.
250 * Generalplus SPI chips seem to be compatible with Macronix
251 * and use the same set of IDs.
252 */
253#define MX_ID 0xC2 /* Macronix (MX) */
254#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
255#define MX_25L1005 0x2011
256#define MX_25L2005 0x2012
257#define MX_25L4005 0x2013 /* MX25L4005{,A} */
258#define MX_25L8005 0x2014
259#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
260#define MX_25L3205 0x2016 /* MX25L3205{,A} */
261#define MX_25L6405 0x2017 /* MX25L3205{,D} */
262#define MX_25L12805 0x2018 /* MX25L12805 */
263#define MX_25L1635D 0x2415
264#define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
Mark Panajotovic502a9132009-08-24 01:42:24 +0000265#define MX_29F001B 0x19
266#define MX_29F001T 0x18
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000267#define MX_29F002B 0x34 /* Same as MX29F002NB */
268#define MX_29F002T 0xB0 /* Same as MX29F002NT */
269#define MX_29F004B 0x46
270#define MX_29F004T 0x45
271#define MX_29F022T 0x36 /* Same as MX29F022NT */
272#define MX_29F040 0xA4 /* Same as MX29F040C */
273#define MX_29F080 0xD5
274#define MX_29F200B 0x57 /* Same as MX29F200CB */
275#define MX_29F200T 0x51 /* Same as MX29F200CT */
276#define MX_29F400B 0xAB /* Same as MX29F400CB */
277#define MX_29F400T 0x23 /* Same as MX29F400CT */
278#define MX_29F800B 0x58
279#define MX_29F800T 0xD6
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000280#define MX_29LV002CB 0x5A
281#define MX_29LV002CT 0x59
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000282#define MX_29LV004B 0xB6 /* Same as MX29LV004CB */
283#define MX_29LV004T 0xB5 /* Same as MX29LV004CT */
284#define MX_29LV008B 0x37 /* Same as MX29LV008CB */
285#define MX_29LV008T 0x3E /* Same as MX29LV008CT */
286#define MX_29LV040 0x4F /* Same as MX29LV040C */
287#define MX_29LV081 0x38
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000288#define MX_29LV128DB 0x7A
289#define MX_29LV128DT 0x7E
290#define MX_29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
291#define MX_29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
292#define MX_29LV320DB 0xA8 /* Same as MX29LV321DB */
293#define MX_29LV320DT 0xA7 /* Same as MX29LV321DT */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000294#define MX_29LV400B 0xBA /* Same as MX29LV400CB */
295#define MX_29LV400T 0xB9 /* Same as MX29LV400CT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000296#define MX_29LV640DB 0xCB /* Same as MX29LV640EB */
297#define MX_29LV640DT 0xC9 /* Same as MX29LV640ET */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000298#define MX_29LV800B 0x5B /* Same as MX29LV800CB */
299#define MX_29LV800T 0xDA /* Same as MX29LV800CT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000300#define MX_29SL402CB 0xF1
301#define MX_29SL402CT 0x70
302#define MX_29SL800CB 0x6B /* Same as MX29SL802CB */
303#define MX_29SL800CT 0xEA /* Same as MX29SL802CT */
304
305/*
306 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
307 * have a 0x7F continuation code prefix.
308 */
309#define PMC_ID 0x7F9D /* PMC */
310#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
311#define PMC_25LV512 0x7B
312#define PMC_25LV010 0x7C
313#define PMC_25LV020 0x7D
314#define PMC_25LV040 0x7E
315#define PMC_25LV080B 0x13
316#define PMC_25LV016B 0x14
317#define PMC_29F002T 0x1D
318#define PMC_29F002B 0x2D
319#define PMC_39LV512 0x1B
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000320#define PMC_39F010 0x1C /* Same as Pm39LV010 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000321#define PMC_39LV020 0x3D
322#define PMC_39LV040 0x3E
323#define PMC_39F020 0x4D
324#define PMC_39F040 0x4E
325#define PMC_49FL002 0x6D
326#define PMC_49FL004 0x6E
327
328#define SHARP_ID 0xB0 /* Sharp */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000329#define SHARP_LH28F008BJxxPT 0xEC
330#define SHARP_LH28F008BJxxPB 0xED
331#define SHARP_LH28F800BVxxBTL 0x4B
332#define SHARP_LH28F800BVxxBV 0x4D
333#define SHARP_LH28F800BVxxTV 0x4C
334#define SHARP_LHF00L02 0xC9 /* Same as LHF00L06/LHF00L07 */
335#define SHARP_LHF00L04 0xCF /* Same as LHF00L03/LHF00L05 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000336
337/*
338 * Spansion was previously a joint venture of AMD and Fujitsu.
339 * S25 chips are SPI. The first device ID byte is memory type and
340 * the second device ID byte is memory capacity.
341 */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000342#define SPANSION_ID 0x01 /* Spansion, same ID as AMD */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000343#define SPANSION_S25FL016A 0x0214
344
345/*
346 * SST25 chips are SPI, first byte of device ID is memory type, second
347 * byte of device ID is related to log(bitsize) at least for some chips.
348 */
349#define SST_ID 0xBF /* SST */
350#define SST_25WF512 0x2501
351#define SST_25WF010 0x2502
352#define SST_25WF020 0x2503
353#define SST_25WF040 0x2504
354#define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */
355#define SST_25VF010_REMS 0x49 /* REMS or RES opcode */
356#define SST_25VF020_REMS 0x43 /* REMS or RES opcode */
357#define SST_25VF040_REMS 0x44 /* REMS or RES opcode */
358#define SST_25VF040B 0x258D
359#define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */
360#define SST_25VF080_REMS 0x80 /* REMS or RES opcode */
361#define SST_25VF080B 0x258E
362#define SST_25VF080B_REMS 0x8E /* REMS or RES opcode */
363#define SST_25VF016B 0x2541
364#define SST_25VF032B 0x254A
365#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
366#define SST_26VF016 0x2601
367#define SST_26VF032 0x2602
368#define SST_27SF512 0xA4
369#define SST_27SF010 0xA5
370#define SST_27SF020 0xA6
371#define SST_27VF010 0xA9
372#define SST_27VF020 0xAA
373#define SST_28SF040 0x04
374#define SST_29EE512 0x5D
375#define SST_29EE010 0x07
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000376#define SST_29LE010 0x08 /* Same as SST29VE010 */
377#define SST_29EE020A 0x10 /* Same as SST29EE020 */
378#define SST_29LE020 0x12 /* Same as SST29VE020 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000379#define SST_29SF020 0x24
380#define SST_29VF020 0x25
381#define SST_29SF040 0x13
382#define SST_29VF040 0x14
383#define SST_39SF010 0xB5
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000384#define SST_39SF020 0xB6 /* Same as 39SF020A */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000385#define SST_39SF040 0xB7
386#define SST_39VF512 0xD4
387#define SST_39VF010 0xD5
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000388#define SST_39VF020 0xD6 /* Same as 39LF020 */
389#define SST_39VF040 0xD7 /* Same as 39LF040 */
390#define SST_39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000391#define SST_49LF040B 0x50
392#define SST_49LF040 0x51
393#define SST_49LF020 0x61
394#define SST_49LF020A 0x52
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000395#define SST_49LF030A 0x1C
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000396#define SST_49LF080A 0x5B
397#define SST_49LF002A 0x57
398#define SST_49LF003A 0x1B
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000399#define SST_49LF004A 0x60 /* Same as 49LF004B */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000400#define SST_49LF008A 0x5A
401#define SST_49LF004C 0x54
402#define SST_49LF008C 0x59
403#define SST_49LF016C 0x5C
404#define SST_49LF160C 0x4C
405
406/*
407 * ST25P chips are SPI, first byte of device ID is memory type, second
408 * byte of device ID is related to log(bitsize) at least for some chips.
409 */
410#define ST_ID 0x20 /* ST / SGS/Thomson */
411#define ST_M25P05A 0x2010
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000412#define ST_M25P05_RES 0x10 /* Same code as M25P10. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000413#define ST_M25P10A 0x2011
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000414#define ST_M25P10_RES 0x10 /* Same code as M25P05. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000415#define ST_M25P20 0x2012
416#define ST_M25P40 0x2013
417#define ST_M25P40_RES 0x12
418#define ST_M25P80 0x2014
419#define ST_M25P16 0x2015
420#define ST_M25P32 0x2016
421#define ST_M25P64 0x2017
422#define ST_M25P128 0x2018
423#define ST_M25PE10 0x8011
424#define ST_M25PE20 0x8012
425#define ST_M25PE40 0x8013
426#define ST_M25PE80 0x8014
427#define ST_M25PE16 0x8015
428#define ST_M50FLW040A 0x08
429#define ST_M50FLW040B 0x28
430#define ST_M50FLW080A 0x80
431#define ST_M50FLW080B 0x81
432#define ST_M50FW002 0x29
433#define ST_M50FW040 0x2C
434#define ST_M50FW080 0x2D
435#define ST_M50FW016 0x2E
436#define ST_M50LPW116 0x30
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000437#define ST_M29F002B 0x34 /* Same as M29F002BB */
438#define ST_M29F002T 0xB0 /* Same as M29F002BT/M29F002NT/M29F002BNT */
439#define ST_M29F040B 0xE2 /* Same as M29F040 */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000440#define ST_M29F080 0xF1
441#define ST_M29F200BT 0xD3
442#define ST_M29F200BB 0xD4
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000443#define ST_M29F400BT 0xD5 /* Same as M29F400T */
444#define ST_M29F400BB 0xD6 /* Same as M29F400B */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000445#define ST_M29F800DB 0x58
446#define ST_M29F800DT 0xEC
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000447#define ST_M29W010B 0x23
448#define ST_M29W040B 0xE3
449
450#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
451#define S29C51001T 0x01
452#define S29C51002T 0x02
453#define S29C51004T 0x03
454#define S29C31004T 0x63
455
456#define TI_ID 0x97 /* Texas Instruments */
457#define TI_OLD_ID 0x01 /* TI chips from last century */
458#define TI_TMS29F002RT 0xB0
459#define TI_TMS29F002RB 0x34
460
461/*
462 * W25X chips are SPI, first byte of device ID is memory type, second
463 * byte of device ID is related to log(bitsize).
464 */
465#define WINBOND_ID 0xDA /* Winbond */
466#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flashes */
467#define W_25X10 0x3011
468#define W_25X20 0x3012
469#define W_25X40 0x3013
470#define W_25X80 0x3014
471#define W_25X16 0x3015
472#define W_25X32 0x3016
473#define W_25X64 0x3017
474#define W_29C011 0xC1
Carl-Daniel Hailfinger37181be2009-08-24 01:34:48 +0000475#define W_29C020C 0x45 /* Same as W29C020 and ASD AE29F2008 */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000476#define W_29C040P 0x46 /* Same as W29C040 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000477#define W_29EE011 0xC1
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000478#define W_39L020 0xB5
479#define W_39L040 0xB6
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000480#define W_39V040FA 0x34
481#define W_39V040A 0x3D
482#define W_39V040B 0x54
483#define W_39V040C 0x50
484#define W_39V080A 0xD0
485#define W_39V080FA 0xD3
486#define W_39V080FA_DM 0x93
487#define W_49F002U 0x0B
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000488#define W_49F020 0x8C
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000489#define W_49V002A 0xB0
490#define W_49V002FA 0x32
491
492#endif /* !FLASHCHIPS_H */