Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 1 | /* |
| 2 | * flash rom utility: enable flash writes |
| 3 | * |
| 4 | * Copyright (C) 2000-2004 ??? |
| 5 | * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * version 2 |
| 10 | * |
| 11 | */ |
| 12 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 13 | #include <sys/io.h> |
| 14 | #include <stdio.h> |
| 15 | #include <pci/pci.h> |
| 16 | #include <stdlib.h> |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 17 | #include <stdint.h> |
| 18 | #include <string.h> |
| 19 | #include "lbtable.h" |
| 20 | #include "debug.h" |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 21 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 22 | static int enable_flash_sis630(struct pci_dev *dev, char *name) |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 23 | { |
| 24 | char b; |
| 25 | |
| 26 | /* get io privilege access PCI configuration space */ |
| 27 | if (iopl(3) != 0) { |
| 28 | perror("Can not set io priviliage"); |
| 29 | exit(1); |
| 30 | } |
| 31 | |
| 32 | /* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630 */ |
| 33 | outl(0x80000840, 0x0cf8); |
| 34 | b = inb(0x0cfc) | 0x0b; |
| 35 | outb(b, 0xcfc); |
| 36 | /* Flash write enable on SiS 540/630 */ |
| 37 | outl(0x80000845, 0x0cf8); |
| 38 | b = inb(0x0cfd) | 0x40; |
| 39 | outb(b, 0xcfd); |
| 40 | |
| 41 | /* The same thing on SiS 950 SuperIO side */ |
| 42 | outb(0x87, 0x2e); |
| 43 | outb(0x01, 0x2e); |
| 44 | outb(0x55, 0x2e); |
| 45 | outb(0x55, 0x2e); |
| 46 | |
| 47 | if (inb(0x2f) != 0x87) { |
| 48 | outb(0x87, 0x4e); |
| 49 | outb(0x01, 0x4e); |
| 50 | outb(0x55, 0x4e); |
| 51 | outb(0xaa, 0x4e); |
| 52 | if (inb(0x4f) != 0x87) { |
| 53 | printf("Can not access SiS 950\n"); |
| 54 | return -1; |
| 55 | } |
| 56 | outb(0x24, 0x4e); |
| 57 | b = inb(0x4f) | 0xfc; |
| 58 | outb(0x24, 0x4e); |
| 59 | outb(b, 0x4f); |
| 60 | outb(0x02, 0x4e); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 61 | outb(0x02, 0x4f); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | outb(0x24, 0x2e); |
| 65 | printf("2f is %#x\n", inb(0x2f)); |
| 66 | b = inb(0x2f) | 0xfc; |
| 67 | outb(0x24, 0x2e); |
| 68 | outb(b, 0x2f); |
| 69 | |
| 70 | outb(0x02, 0x2e); |
| 71 | outb(0x02, 0x2f); |
| 72 | |
| 73 | return 0; |
| 74 | } |
| 75 | |
| 76 | static int enable_flash_e7500(struct pci_dev *dev, char *name) |
| 77 | { |
| 78 | /* register 4e.b gets or'ed with one */ |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 79 | uint8_t old, new; |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 80 | /* if it fails, it fails. There are so many variations of broken mobos |
| 81 | * that it is hard to argue that we should quit at this point. |
| 82 | */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 83 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 84 | old = pci_read_byte(dev, 0x4e); |
| 85 | |
| 86 | new = old | 1; |
| 87 | |
| 88 | if (new == old) |
| 89 | return 0; |
| 90 | |
| 91 | pci_write_byte(dev, 0x4e, new); |
| 92 | |
| 93 | if (pci_read_byte(dev, 0x4e) != new) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 94 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 95 | 0x4e, new, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 96 | return -1; |
| 97 | } |
| 98 | return 0; |
| 99 | } |
| 100 | |
Ronald G. Minnich | 6a96741 | 2004-09-28 20:09:06 +0000 | [diff] [blame] | 101 | static int enable_flash_ich4(struct pci_dev *dev, char *name) |
| 102 | { |
| 103 | /* register 4e.b gets or'ed with one */ |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 104 | uint8_t old, new; |
Ronald G. Minnich | 6a96741 | 2004-09-28 20:09:06 +0000 | [diff] [blame] | 105 | /* if it fails, it fails. There are so many variations of broken mobos |
| 106 | * that it is hard to argue that we should quit at this point. |
| 107 | */ |
| 108 | |
| 109 | old = pci_read_byte(dev, 0x4e); |
| 110 | |
| 111 | new = old | 1; |
| 112 | |
| 113 | if (new == old) |
| 114 | return 0; |
| 115 | |
| 116 | pci_write_byte(dev, 0x4e, new); |
| 117 | |
| 118 | if (pci_read_byte(dev, 0x4e) != new) { |
| 119 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 120 | 0x4e, new, name); |
| 121 | return -1; |
| 122 | } |
| 123 | return 0; |
| 124 | } |
| 125 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 126 | static int enable_flash_vt8235(struct pci_dev *dev, char *name) |
| 127 | { |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 128 | uint8_t old, new, val; |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 129 | unsigned int base; |
| 130 | int ok; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 131 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 132 | /* get io privilege access PCI configuration space */ |
| 133 | if (iopl(3) != 0) { |
| 134 | perror("Can not set io priviliage"); |
| 135 | exit(1); |
| 136 | } |
| 137 | |
| 138 | old = pci_read_byte(dev, 0x40); |
| 139 | |
| 140 | new = old | 0x10; |
| 141 | |
| 142 | if (new == old) |
| 143 | return 0; |
| 144 | |
| 145 | ok = pci_write_byte(dev, 0x40, new); |
| 146 | if (ok != 0) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 147 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 148 | old, new, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 149 | } |
| 150 | |
| 151 | /* enable GPIO15 which is connected to write protect. */ |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 152 | base = ((pci_read_byte(dev, 0x88) & 0x80) | pci_read_byte(dev, 0x89) << 8); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 153 | val = inb(base + 0x4d); |
| 154 | val |= 0x80; |
| 155 | outb(val, base + 0x4d); |
| 156 | |
| 157 | if (ok != 0) { |
| 158 | return -1; |
| 159 | } else { |
| 160 | return 0; |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | static int enable_flash_vt8231(struct pci_dev *dev, char *name) |
| 165 | { |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 166 | uint8_t val; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 167 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 168 | val = pci_read_byte(dev, 0x40); |
| 169 | val |= 0x10; |
| 170 | pci_write_byte(dev, 0x40, val); |
| 171 | |
| 172 | if (pci_read_byte(dev, 0x40) != val) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 173 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 174 | 0x40, val, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 175 | return -1; |
| 176 | } |
| 177 | return 0; |
| 178 | } |
| 179 | |
| 180 | static int enable_flash_cs5530(struct pci_dev *dev, char *name) |
| 181 | { |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 182 | uint8_t new; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 183 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 184 | pci_write_byte(dev, 0x52, 0xee); |
| 185 | |
| 186 | new = pci_read_byte(dev, 0x52); |
| 187 | |
| 188 | if (new != 0xee) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 189 | printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 190 | 0x52, new, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 191 | return -1; |
| 192 | } |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 193 | |
| 194 | new = pci_read_byte(dev, 0x5b) | 0x20; |
| 195 | pci_write_byte(dev, 0x5b, new); |
| 196 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 197 | return 0; |
| 198 | } |
| 199 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 200 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 201 | static int enable_flash_sc1100(struct pci_dev *dev, char *name) |
| 202 | { |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 203 | uint8_t new; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 204 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 205 | pci_write_byte(dev, 0x52, 0xee); |
| 206 | |
| 207 | new = pci_read_byte(dev, 0x52); |
| 208 | |
| 209 | if (new != 0xee) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 210 | printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 211 | 0x52, new, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 212 | return -1; |
| 213 | } |
| 214 | return 0; |
| 215 | } |
| 216 | |
| 217 | static int enable_flash_sis5595(struct pci_dev *dev, char *name) |
| 218 | { |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 219 | uint8_t new, newer; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 220 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 221 | new = pci_read_byte(dev, 0x45); |
| 222 | |
| 223 | /* clear bit 5 */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 224 | new &= (~0x20); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 225 | /* set bit 2 */ |
| 226 | new |= 0x4; |
| 227 | |
| 228 | pci_write_byte(dev, 0x45, new); |
| 229 | |
| 230 | newer = pci_read_byte(dev, 0x45); |
| 231 | if (newer != new) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 232 | printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 233 | 0x45, new, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 234 | printf("Stuck at 0x%x\n", newer); |
| 235 | return -1; |
| 236 | } |
| 237 | return 0; |
| 238 | } |
| 239 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 240 | static int enable_flash_amd8111(struct pci_dev *dev, char *name) |
| 241 | { |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 242 | /* register 4e.b gets or'ed with one */ |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 243 | uint8_t old, new; |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 244 | /* if it fails, it fails. There are so many variations of broken mobos |
| 245 | * that it is hard to argue that we should quit at this point. |
| 246 | */ |
| 247 | |
Ollie Lho | d11f361 | 2004-12-07 17:19:04 +0000 | [diff] [blame] | 248 | /* enable decoding at 0xffb00000 to 0xffffffff */ |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 249 | old = pci_read_byte(dev, 0x43); |
Ollie Lho | d11f361 | 2004-12-07 17:19:04 +0000 | [diff] [blame] | 250 | new = old | 0xC0; |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 251 | if (new != old) { |
| 252 | pci_write_byte(dev, 0x43, new); |
| 253 | if (pci_read_byte(dev, 0x43) != new) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 254 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 255 | 0x43, new, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 256 | } |
| 257 | } |
| 258 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 259 | old = pci_read_byte(dev, 0x40); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 260 | new = old | 0x01; |
| 261 | if (new == old) |
| 262 | return 0; |
| 263 | pci_write_byte(dev, 0x40, new); |
| 264 | |
| 265 | if (pci_read_byte(dev, 0x40) != new) { |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 266 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 267 | 0x40, new, name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 268 | return -1; |
| 269 | } |
| 270 | return 0; |
| 271 | } |
| 272 | |
Yinghai Lu | 952dfce | 2005-07-06 17:13:46 +0000 | [diff] [blame] | 273 | //By yhlu |
| 274 | static int enable_flash_ck804(struct pci_dev *dev, char *name) |
| 275 | { |
| 276 | /* register 4e.b gets or'ed with one */ |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 277 | uint8_t old, new; |
Yinghai Lu | 952dfce | 2005-07-06 17:13:46 +0000 | [diff] [blame] | 278 | /* if it fails, it fails. There are so many variations of broken mobos |
| 279 | * that it is hard to argue that we should quit at this point. |
| 280 | */ |
| 281 | |
| 282 | //dump_pci_device(dev); |
| 283 | |
| 284 | old = pci_read_byte(dev, 0x88); |
| 285 | new = old | 0xc0; |
| 286 | if (new != old) { |
| 287 | pci_write_byte(dev, 0x88, new); |
| 288 | if (pci_read_byte(dev, 0x88) != new) { |
| 289 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 290 | 0x88, new, name); |
| 291 | } |
| 292 | } |
| 293 | |
| 294 | old = pci_read_byte(dev, 0x6d); |
| 295 | new = old | 0x01; |
| 296 | if (new == old) |
| 297 | return 0; |
| 298 | pci_write_byte(dev, 0x6d, new); |
| 299 | |
| 300 | if (pci_read_byte(dev, 0x6d) != new) { |
| 301 | printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", |
| 302 | 0x6d, new, name); |
| 303 | return -1; |
| 304 | } |
| 305 | return 0; |
| 306 | } |
| 307 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 308 | typedef struct penable { |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 309 | unsigned short vendor, device; |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 310 | char *name; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 311 | int (*doit) (struct pci_dev * dev, char *name); |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 312 | } FLASH_ENABLE; |
| 313 | |
| 314 | static FLASH_ENABLE enables[] = { |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 315 | {0x1039, 0x0630, "sis630", enable_flash_sis630}, |
| 316 | {0x8086, 0x2480, "E7500", enable_flash_e7500}, |
Ronald G. Minnich | 6a96741 | 2004-09-28 20:09:06 +0000 | [diff] [blame] | 317 | {0x8086, 0x24c0, "ICH4", enable_flash_ich4}, |
Ronald G. Minnich | d2c3a62 | 2006-02-24 17:10:10 +0000 | [diff] [blame] | 318 | {0x8086, 0x24d0, "ICH5", enable_flash_ich4}, |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 319 | {0x1106, 0x8231, "VT8231", enable_flash_vt8231}, |
| 320 | {0x1106, 0x3177, "VT8235", enable_flash_vt8235}, |
| 321 | {0x1078, 0x0100, "CS5530", enable_flash_cs5530}, |
| 322 | {0x100b, 0x0510, "SC1100", enable_flash_sc1100}, |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 323 | {0x1039, 0x0008, "SIS5595", enable_flash_sis5595}, |
| 324 | {0x1022, 0x7468, "AMD8111", enable_flash_amd8111}, |
Yinghai Lu | 952dfce | 2005-07-06 17:13:46 +0000 | [diff] [blame] | 325 | {0x10de, 0x0050, "NVIDIA CK804", enable_flash_ck804}, // LPC |
| 326 | {0x10de, 0x0051, "NVIDIA CK804", enable_flash_ck804}, // Pro |
| 327 | {0x10de, 0x00d3, "NVIDIA CK804", enable_flash_ck804}, // Slave, should not be here, to fix known bug for A01. |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 328 | }; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 329 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 330 | static int mbenable_island_aruma(void) |
| 331 | { |
| 332 | #define EFIR 0x2e // Exteneded function index register, either 0x2e or 0x4e |
| 333 | #define EFDR EFIR + 1 // Extended function data register, one plus the index reg. |
| 334 | char b; |
| 335 | // Disable the flash write protect. The flash write protect is |
| 336 | // connected to the WinBond w83627hf GPIO 24. |
| 337 | |
| 338 | /* get io privilege access winbond config space */ |
| 339 | if (iopl(3) != 0) { |
| 340 | perror("Can not set io priviliage"); |
| 341 | exit(1); |
| 342 | } |
| 343 | |
| 344 | printf("Disabling mainboard flash write protection.\n"); |
| 345 | |
| 346 | outb(0x87, EFIR); // sequence to unlock extended functions |
| 347 | outb(0x87, EFIR); |
| 348 | |
| 349 | outb(0x20, EFIR); // SIO device ID register |
| 350 | b = inb(EFDR); |
| 351 | printf_debug("W83627HF device ID = 0x%x\n",b); |
| 352 | |
| 353 | if (b != 0x52) { |
| 354 | perror("Incorrect device ID, aborting write protect disable\n"); |
| 355 | exit(1); |
| 356 | } |
| 357 | |
| 358 | outb(0x2b, EFIR); // GPIO multiplexed pin reg. |
| 359 | b = inb(EFDR) | 0x10; |
| 360 | outb(0x2b, EFIR); |
| 361 | outb(b, EFDR); // select GPIO 24 instead of WDTO |
| 362 | |
| 363 | outb(0x7, EFIR); // logical device select |
| 364 | outb(0x8, EFDR); // point to device 8, GPIO port 2 |
| 365 | |
| 366 | outb(0x30, EFIR); // logic device activation control |
| 367 | outb(0x1, EFDR); // activate |
| 368 | |
| 369 | outb(0xf0, EFIR); // GPIO 20-27 I/O selection register |
| 370 | b = inb(EFDR) & ~0x10; |
| 371 | outb(0xf0, EFIR); |
| 372 | outb(b, EFDR); // set GPIO 24 as an output |
| 373 | |
| 374 | outb(0xf1, EFIR); // GPIO 20-27 data register |
| 375 | b = inb(EFDR) | 0x10; |
| 376 | outb(0xf1, EFIR); |
| 377 | outb(b, EFDR); // set GPIO 24 |
| 378 | |
| 379 | outb(0xaa, EFIR); // command to exit extended functions |
| 380 | |
| 381 | return 0; |
| 382 | } |
| 383 | |
| 384 | typedef struct mbenable { |
| 385 | char *vendor, *part; |
| 386 | int (*doit)(void); |
| 387 | } MAINBOARD_ENABLE; |
| 388 | |
| 389 | static MAINBOARD_ENABLE mbenables[] = { |
| 390 | { "ISLAND", "ARUMA", mbenable_island_aruma }, |
| 391 | }; |
| 392 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 393 | int enable_flash_write() |
| 394 | { |
| 395 | int i; |
| 396 | struct pci_access *pacc; |
| 397 | struct pci_dev *dev = 0; |
| 398 | FLASH_ENABLE *enable = 0; |
| 399 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 400 | pacc = pci_alloc(); /* Get the pci_access structure */ |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 401 | /* Set all options you want -- here we stick with the defaults */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 402 | pci_init(pacc); /* Initialize the PCI library */ |
| 403 | pci_scan_bus(pacc); /* We want to get the list of devices */ |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 404 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 405 | |
| 406 | /* First look whether we have to do something for this |
| 407 | * motherboard. |
| 408 | */ |
| 409 | for (i = 0; i < sizeof(mbenables) / sizeof(mbenables[0]); i++) { |
| 410 | if(lb_vendor && !strcmp(mbenables[i].vendor, lb_vendor) && |
| 411 | lb_part && !strcmp(mbenables[i].part, lb_part)) { |
| 412 | mbenables[i].doit(); |
| 413 | break; |
| 414 | } |
| 415 | } |
| 416 | |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 417 | /* now let's try to find the chipset we have ... */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 418 | for (i = 0; i < sizeof(enables) / sizeof(enables[0]) && (!dev); |
| 419 | i++) { |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 420 | struct pci_filter f; |
| 421 | struct pci_dev *z; |
| 422 | /* the first param is unused. */ |
| 423 | pci_filter_init((struct pci_access *) 0, &f); |
| 424 | f.vendor = enables[i].vendor; |
| 425 | f.device = enables[i].device; |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 426 | for (z = pacc->devices; z; z = z->next) |
Ollie Lho | cbbf125 | 2004-03-17 22:22:08 +0000 | [diff] [blame] | 427 | if (pci_filter_match(&f, z)) { |
| 428 | enable = &enables[i]; |
| 429 | dev = z; |
| 430 | } |
| 431 | } |
| 432 | |
| 433 | /* now do the deed. */ |
| 434 | if (enable) { |
| 435 | printf("Enabling flash write on %s...", enable->name); |
| 436 | if (enable->doit(dev, enable->name) == 0) |
| 437 | printf("OK\n"); |
| 438 | } |
| 439 | return 0; |
| 440 | } |