blob: a4b680a1aae476d409bbfe5a005a99361c15aa02 [file] [log] [blame]
Uwe Hermannb4dcb712009-05-13 11:36:06 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <stdlib.h>
22#include <string.h>
Uwe Hermann92c53ee2009-05-13 12:01:57 +000023#include <fcntl.h>
24#include <sys/types.h>
25#include <sys/stat.h>
Uwe Hermannb4dcb712009-05-13 11:36:06 +000026#include <errno.h>
Uwe Hermannb4dcb712009-05-13 11:36:06 +000027#include "flash.h"
28
29#define BIOS_ROM_ADDR 0x04
30#define BIOS_ROM_DATA 0x08
31#define INT_STATUS 0x0e
32#define SELECT_REG_WINDOW 0x800
33
Uwe Hermannb4dcb712009-05-13 11:36:06 +000034#define PCI_VENDOR_ID_3COM 0x10b7
35
Uwe Hermann515ab3d2009-05-15 17:02:34 +000036struct pcidev_status nics_3com[] = {
Uwe Hermannb4dcb712009-05-13 11:36:06 +000037 /* 3C90xB */
Uwe Hermann515ab3d2009-05-15 17:02:34 +000038 {0x10b7, 0x9055, PCI_NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"},
39 {0x10b7, 0x9001, PCI_NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" },
40 {0x10b7, 0x9004, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T (TPO)" },
41 {0x10b7, 0x9005, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" },
42 {0x10b7, 0x9006, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" },
43 {0x10b7, 0x900a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FL" },
44 {0x10b7, 0x905a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FX" },
Uwe Hermannb4dcb712009-05-13 11:36:06 +000045
46 /* 3C905C */
Uwe Hermann515ab3d2009-05-15 17:02:34 +000047 {0x10b7, 0x9200, PCI_OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" },
Uwe Hermannb4dcb712009-05-13 11:36:06 +000048
49 /* 3C980C */
Uwe Hermann515ab3d2009-05-15 17:02:34 +000050 {0x10b7, 0x9805, PCI_NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" },
Uwe Hermannb4dcb712009-05-13 11:36:06 +000051
52 {},
53};
54
55int nic3com_init(void)
56{
Uwe Hermanna0869322009-05-14 20:41:57 +000057 get_io_perms();
Uwe Hermannb4dcb712009-05-13 11:36:06 +000058
Uwe Hermann515ab3d2009-05-15 17:02:34 +000059 io_base_addr = pcidev_init(PCI_VENDOR_ID_3COM, nics_3com);
Uwe Hermannb4dcb712009-05-13 11:36:06 +000060
61 /*
62 * The lowest 16 bytes of the I/O mapped register space of (most) 3COM
63 * cards form a 'register window' into one of multiple (usually 8)
64 * register banks. For 3C90xB/3C90xC we need register window/bank 0.
65 */
66 OUTW(SELECT_REG_WINDOW + 0, io_base_addr + INT_STATUS);
67
68 return 0;
69}
70
71int nic3com_shutdown(void)
72{
Uwe Hermann515ab3d2009-05-15 17:02:34 +000073 free(pcidev_bdf);
Christian Ruppert0cdb0312009-05-14 18:57:26 +000074 pci_cleanup(pacc);
Uwe Hermanna0869322009-05-14 20:41:57 +000075#if defined(__FreeBSD__) || defined(__DragonFly__)
76 close(io_fd);
77#endif
Uwe Hermannb4dcb712009-05-13 11:36:06 +000078 return 0;
79}
80
81void *nic3com_map(const char *descr, unsigned long phys_addr, size_t len)
82{
83 return 0;
84}
85
86void nic3com_unmap(void *virt_addr, size_t len)
87{
88}
89
90void nic3com_chip_writeb(uint8_t val, volatile void *addr)
91{
Carl-Daniel Hailfinger3b7e75a2009-05-14 21:41:10 +000092 OUTL((uint32_t)(intptr_t)addr, io_base_addr + BIOS_ROM_ADDR);
Uwe Hermannb4dcb712009-05-13 11:36:06 +000093 OUTB(val, io_base_addr + BIOS_ROM_DATA);
94}
95
96void nic3com_chip_writew(uint16_t val, volatile void *addr)
97{
98}
99
100void nic3com_chip_writel(uint32_t val, volatile void *addr)
101{
102}
103
104uint8_t nic3com_chip_readb(const volatile void *addr)
105{
106 uint8_t val;
107
Carl-Daniel Hailfinger3b7e75a2009-05-14 21:41:10 +0000108 OUTL((uint32_t)(intptr_t)addr, io_base_addr + BIOS_ROM_ADDR);
Uwe Hermannb4dcb712009-05-13 11:36:06 +0000109 val = INB(io_base_addr + BIOS_ROM_DATA);
110
111 return val;
112}
113
114uint16_t nic3com_chip_readw(const volatile void *addr)
115{
116 return 0xffff;
117}
118
119uint32_t nic3com_chip_readl(const volatile void *addr)
120{
121 return 0xffffffff;
122}