Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Peter Stuge <peter@stuge.se> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 21 | #include "flash.h" |
| 22 | |
| 23 | int probe_w39v040c(struct flashchip *flash) |
| 24 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 25 | chipaddr bios = flash->virtual_memory; |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 26 | uint8_t id1, id2, lock; |
| 27 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 28 | chip_writeb(0xAA, bios + 0x5555); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 29 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 30 | chip_writeb(0x55, bios + 0x2AAA); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 31 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 32 | chip_writeb(0x90, bios + 0x5555); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 33 | programmer_delay(10); |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 34 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 35 | id1 = chip_readb(bios); |
| 36 | id2 = chip_readb(bios + 1); |
| 37 | lock = chip_readb(bios + 0xfff2); |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 38 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 39 | chip_writeb(0xAA, bios + 0x5555); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 40 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 41 | chip_writeb(0x55, bios + 0x2AAA); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 42 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 43 | chip_writeb(0xF0, bios + 0x5555); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 44 | programmer_delay(40); |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 45 | |
Peter Stuge | 5cafc33 | 2009-01-25 23:52:45 +0000 | [diff] [blame] | 46 | printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 47 | if (!oddparity(id1)) |
| 48 | printf_debug(", id1 parity violation"); |
| 49 | printf_debug("\n"); |
| 50 | if (flash->manufacture_id == id1 && flash->model_id == id2) { |
| 51 | printf("%s: Boot block #TBL is %slocked, rest of chip #WP is %slocked.\n", |
| 52 | __func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un"); |
| 53 | return 1; |
| 54 | } |
| 55 | |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | int erase_w39v040c(struct flashchip *flash) |
| 60 | { |
| 61 | int i; |
| 62 | unsigned int total_size = flash->total_size * 1024; |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 63 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 64 | for (i = 0; i < total_size; i += flash->page_size) { |
| 65 | if (erase_sector_jedec(flash, i, flash->page_size)) { |
| 66 | fprintf(stderr, "ERASE FAILED!\n"); |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 67 | return -1; |
| 68 | } |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 69 | } |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 70 | |
| 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | int write_w39v040c(struct flashchip *flash, uint8_t *buf) |
| 75 | { |
| 76 | int i; |
| 77 | int total_size = flash->total_size * 1024; |
| 78 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 79 | chipaddr bios = flash->virtual_memory; |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 80 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 81 | if (flash->erase(flash)) { |
| 82 | fprintf(stderr, "ERASE FAILED!\n"); |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 83 | return -1; |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 84 | } |
Peter Stuge | cce2682 | 2008-07-21 17:48:40 +0000 | [diff] [blame] | 85 | |
| 86 | printf("Programming page: "); |
| 87 | for (i = 0; i < total_size / page_size; i++) { |
| 88 | printf("%04d at address: 0x%08x", i, i * page_size); |
| 89 | write_sector_jedec(bios, buf + i * page_size, |
| 90 | bios + i * page_size, page_size); |
| 91 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
| 92 | } |
| 93 | printf("\n"); |
| 94 | |
| 95 | return 0; |
| 96 | } |