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Jason Wanga3f04be2008-11-28 21:36:51 +00001/*
2 * This file is part of the flashrom project.
3 *
Jason Wang13f98ce2008-11-29 15:07:15 +00004 * Copyright (C) 2008 Wang Qingpei <Qingpei.Wang@amd.com>
5 * Copyright (C) 2008 Joe Bao <Zheng.Bao@amd.com>
Uwe Hermann97e8f222009-04-13 21:35:49 +00006 * Copyright (C) 2008 Advanced Micro Devices, Inc.
Jason Wanga3f04be2008-11-28 21:36:51 +00007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 */
22
Jason Wanga3f04be2008-11-28 21:36:51 +000023#include <string.h>
Jason Wanga3f04be2008-11-28 21:36:51 +000024#include "flash.h"
25#include "spi.h"
26
Carl-Daniel Hailfinger2c7ba8c2009-06-23 00:47:26 +000027/* This struct is unused, but helps visualize the SB600 SPI BAR layout.
28 *struct sb600_spi_controller {
29 * unsigned int spi_cntrl0; / * 00h * /
30 * unsigned int restrictedcmd1; / * 04h * /
31 * unsigned int restrictedcmd2; / * 08h * /
32 * unsigned int spi_cntrl1; / * 0ch * /
33 * unsigned int spi_cmdvalue0; / * 10h * /
34 * unsigned int spi_cmdvalue1; / * 14h * /
35 * unsigned int spi_cmdvalue2; / * 18h * /
36 * unsigned int spi_fakeid; / * 1Ch * /
37 *};
38 */
Jason Wanga3f04be2008-11-28 21:36:51 +000039
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +000040uint8_t *sb600_spibar = NULL;
Jason Wanga3f04be2008-11-28 21:36:51 +000041
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +000042int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
Jason Wanga3f04be2008-11-28 21:36:51 +000043{
Carl-Daniel Hailfinger38a059d2009-06-13 12:04:03 +000044 /* Maximum read length is 8 bytes. */
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +000045 return spi_read_chunked(flash, buf, start, len, 8);
Jason Wanga3f04be2008-11-28 21:36:51 +000046}
47
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +000048/* FIXME: SB600 can write 5 bytes per transaction. */
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +000049int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf)
Jason Wanga3f04be2008-11-28 21:36:51 +000050{
51 int rc = 0, i;
52 int total_size = flash->total_size * 1024;
Carl-Daniel Hailfinger03adbe12009-05-09 02:09:45 +000053 int result;
Jason Wanga3f04be2008-11-28 21:36:51 +000054
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +000055 spi_disable_blockprotect();
Jason Wanga3f04be2008-11-28 21:36:51 +000056 /* Erase first */
57 printf("Erasing flash before programming... ");
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +000058 if (erase_flash(flash)) {
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000059 fprintf(stderr, "ERASE FAILED!\n");
60 return -1;
61 }
Jason Wanga3f04be2008-11-28 21:36:51 +000062 printf("done.\n");
63
64 printf("Programming flash");
65 for (i = 0; i < total_size; i++, buf++) {
Carl-Daniel Hailfinger2f1b36f2009-07-12 12:06:18 +000066 result = spi_byte_program(i, *buf);
Stefan Reinauerab044b22009-09-16 08:26:59 +000067 if (result) {
68 // spi_byte_program reported the error for us already
69 printf_debug("... continuing anyway.\n");
70 }
71
Jason Wanga3f04be2008-11-28 21:36:51 +000072 /* wait program complete. */
73 if (i % 0x8000 == 0)
74 printf(".");
75 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
76 ;
77 }
78 printf(" done.\n");
79 return rc;
80}
81
Carl-Daniel Hailfinger2c7ba8c2009-06-23 00:47:26 +000082static void reset_internal_fifo_pointer(void)
Jason Wanga3f04be2008-11-28 21:36:51 +000083{
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000084 mmio_writeb(mmio_readb(sb600_spibar + 2) | 0x10, sb600_spibar + 2);
Jason Wanga3f04be2008-11-28 21:36:51 +000085
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000086 while (mmio_readb(sb600_spibar + 0xD) & 0x7)
Jason Wanga3f04be2008-11-28 21:36:51 +000087 printf("reset\n");
88}
89
Carl-Daniel Hailfinger2c7ba8c2009-06-23 00:47:26 +000090static void execute_command(void)
Jason Wanga3f04be2008-11-28 21:36:51 +000091{
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000092 mmio_writeb(mmio_readb(sb600_spibar + 2) | 1, sb600_spibar + 2);
Jason Wanga3f04be2008-11-28 21:36:51 +000093
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +000094 while (mmio_readb(sb600_spibar + 2) & 1)
Jason Wanga3f04be2008-11-28 21:36:51 +000095 ;
96}
97
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +000098int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Jason Wanga3f04be2008-11-28 21:36:51 +000099 const unsigned char *writearr, unsigned char *readarr)
100{
101 int count;
102 /* First byte is cmd which can not being sent through FIFO. */
103 unsigned char cmd = *writearr++;
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000104 unsigned int readoffby1;
Jason Wanga3f04be2008-11-28 21:36:51 +0000105
106 writecnt--;
107
Jason Wanga3f04be2008-11-28 21:36:51 +0000108 printf_debug("%s, cmd=%x, writecnt=%x, readcnt=%x\n",
109 __func__, cmd, writecnt, readcnt);
110
111 if (readcnt > 8) {
112 printf("%s, SB600 SPI controller can not receive %d bytes, "
Carl-Daniel Hailfinger142e30f2009-07-14 10:26:56 +0000113 "it is limited to 8 bytes\n", __func__, readcnt);
114 return SPI_INVALID_LENGTH;
Jason Wanga3f04be2008-11-28 21:36:51 +0000115 }
116
117 if (writecnt > 8) {
Carl-Daniel Hailfinger142e30f2009-07-14 10:26:56 +0000118 printf("%s, SB600 SPI controller can not send %d bytes, "
119 "it is limited to 8 bytes\n", __func__, writecnt);
120 return SPI_INVALID_LENGTH;
Jason Wanga3f04be2008-11-28 21:36:51 +0000121 }
122
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000123 /* This is a workaround for a bug in SB600 and SB700. If we only send
124 * an opcode and no additional data/address, the SPI controller will
125 * read one byte too few from the chip. Basically, the last byte of
126 * the chip response is discarded and will not end up in the FIFO.
127 * It is unclear if the CS# line is set high too early as well.
128 */
129 readoffby1 = (writecnt) ? 0 : 1;
130 mmio_writeb((readcnt + readoffby1) << 4 | (writecnt), sb600_spibar + 1);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000131 mmio_writeb(cmd, sb600_spibar + 0);
Jason Wanga3f04be2008-11-28 21:36:51 +0000132
133 /* Before we use the FIFO, reset it first. */
134 reset_internal_fifo_pointer();
135
136 /* Send the write byte to FIFO. */
137 for (count = 0; count < writecnt; count++, writearr++) {
138 printf_debug(" [%x]", *writearr);
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000139 mmio_writeb(*writearr, sb600_spibar + 0xC);
Jason Wanga3f04be2008-11-28 21:36:51 +0000140 }
141 printf_debug("\n");
142
143 /*
144 * We should send the data by sequence, which means we need to reset
145 * the FIFO pointer to the first byte we want to send.
146 */
147 reset_internal_fifo_pointer();
148
149 execute_command();
150
151 /*
152 * After the command executed, we should find out the index of the
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000153 * received byte. Here we just reset the FIFO pointer and skip the
154 * writecnt.
155 * It would be possible to increase the FIFO pointer by one instead
156 * of reading and discarding one byte from the FIFO.
157 * The FIFO is implemented on top of an 8 byte ring buffer and the
158 * buffer is never cleared. For every byte that is shifted out after
159 * the opcode, the FIFO already stores the response from the chip.
160 * Usually, the chip will respond with 0x00 or 0xff.
Jason Wanga3f04be2008-11-28 21:36:51 +0000161 */
162 reset_internal_fifo_pointer();
163
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000164 /* Skip the bytes we sent. */
Jason Wanga3f04be2008-11-28 21:36:51 +0000165 for (count = 0; count < writecnt; count++) {
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000166 cmd = mmio_readb(sb600_spibar + 0xC);
Jason Wanga3f04be2008-11-28 21:36:51 +0000167 printf_debug("[ %2x]", cmd);
168 }
169
Carl-Daniel Hailfingerf8555e22009-07-23 01:36:08 +0000170 printf_debug("The FIFO pointer after skipping is %d.\n",
171 mmio_readb(sb600_spibar + 0xd) & 0x07);
Jason Wanga3f04be2008-11-28 21:36:51 +0000172 for (count = 0; count < readcnt; count++, readarr++) {
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000173 *readarr = mmio_readb(sb600_spibar + 0xC);
Jason Wanga3f04be2008-11-28 21:36:51 +0000174 printf_debug("[%02x]", *readarr);
175 }
176 printf_debug("\n");
177
178 return 0;
179}