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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00006 *
Uwe Hermannd1107642007-08-29 17:52:32 +00007 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000011 *
Uwe Hermannd1107642007-08-29 17:52:32 +000012 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000016 *
Uwe Hermannd1107642007-08-29 17:52:32 +000017 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000020 */
21
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000022#include <stdio.h>
Ollie Lho184a4042005-11-26 21:55:36 +000023#include <stdint.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000024#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000025
26#define AUTO_PG_ERASE1 0x20
27#define AUTO_PG_ERASE2 0xD0
Ollie Lhocf29de82004-03-18 19:40:07 +000028#define AUTO_PGRM 0x10
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#define CHIP_ERASE 0x30
30#define RESET 0xFF
31#define READ_ID 0x90
32
Ollie Lho184a4042005-11-26 21:55:36 +000033static __inline__ void protect_28sf040(volatile uint8_t *bios)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000034{
Carl-Daniel Hailfingerb8855692009-03-06 00:40:25 +000035 uint8_t tmp;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000036
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000037 tmp = chip_readb(bios + 0x1823);
38 tmp = chip_readb(bios + 0x1820);
39 tmp = chip_readb(bios + 0x1822);
40 tmp = chip_readb(bios + 0x0418);
41 tmp = chip_readb(bios + 0x041B);
42 tmp = chip_readb(bios + 0x0419);
43 tmp = chip_readb(bios + 0x040A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000044}
45
Ollie Lho184a4042005-11-26 21:55:36 +000046static __inline__ void unprotect_28sf040(volatile uint8_t *bios)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000047{
Carl-Daniel Hailfingerb8855692009-03-06 00:40:25 +000048 uint8_t tmp;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000049
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000050 tmp = chip_readb(bios + 0x1823);
51 tmp = chip_readb(bios + 0x1820);
52 tmp = chip_readb(bios + 0x1822);
53 tmp = chip_readb(bios + 0x0418);
54 tmp = chip_readb(bios + 0x041B);
55 tmp = chip_readb(bios + 0x0419);
56 tmp = chip_readb(bios + 0x041A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000057}
58
Ollie Lho184a4042005-11-26 21:55:36 +000059static __inline__ int erase_sector_28sf040(volatile uint8_t *bios,
Ollie Lho761bf1b2004-03-20 16:46:10 +000060 unsigned long address)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000061{
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000062 chip_writeb(AUTO_PG_ERASE1, bios);
63 chip_writeb(AUTO_PG_ERASE2, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000064
65 /* wait for Toggle bit ready */
66 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000067
Uwe Hermannffec5f32007-08-23 16:08:21 +000068 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000069}
70
Ollie Lho184a4042005-11-26 21:55:36 +000071static __inline__ int write_sector_28sf040(volatile uint8_t *bios,
72 uint8_t *src,
73 volatile uint8_t *dst,
Ollie Lho761bf1b2004-03-20 16:46:10 +000074 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000075{
76 int i;
77
78 for (i = 0; i < page_size; i++) {
79 /* transfer data from source to destination */
80 if (*src == 0xFF) {
81 dst++, src++;
82 /* If the data is 0xFF, don't program it */
83 continue;
84 }
85 /*issue AUTO PROGRAM command */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000086 chip_writeb(AUTO_PGRM, dst);
87 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000088
89 /* wait for Toggle bit ready */
90 toggle_ready_jedec(bios);
91 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000092
Uwe Hermannffec5f32007-08-23 16:08:21 +000093 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000094}
95
Ollie Lho761bf1b2004-03-20 16:46:10 +000096int probe_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000097{
Stefan Reinauerce532972007-05-23 17:20:56 +000098 volatile uint8_t *bios = flash->virtual_memory;
Ed Swierk966dc202007-08-13 04:10:32 +000099 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000100
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000101 chip_writeb(RESET, bios);
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000102 myusec_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000103
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000104 chip_writeb(READ_ID, bios);
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000105 myusec_delay(10);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000106 id1 = chip_readb(bios);
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000107 myusec_delay(10);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000108 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000109
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000110 chip_writeb(RESET, bios);
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000111 myusec_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000112
Peter Stuge5cafc332009-01-25 23:52:45 +0000113 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000114 if (id1 == flash->manufacture_id && id2 == flash->model_id)
115 return 1;
116
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000117 return 0;
118}
119
Ollie Lho761bf1b2004-03-20 16:46:10 +0000120int erase_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000121{
Stefan Reinauerce532972007-05-23 17:20:56 +0000122 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000123
Ollie Lho761bf1b2004-03-20 16:46:10 +0000124 unprotect_28sf040(bios);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000125 chip_writeb(CHIP_ERASE, bios);
126 chip_writeb(CHIP_ERASE, bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000127 protect_28sf040(bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000128
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000129 myusec_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000130 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000131
Uwe Hermannffec5f32007-08-23 16:08:21 +0000132 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000133}
134
Ollie Lho184a4042005-11-26 21:55:36 +0000135int write_28sf040(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000136{
137 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000138 int total_size = flash->total_size * 1024;
139 int page_size = flash->page_size;
Stefan Reinauerce532972007-05-23 17:20:56 +0000140 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000141
Ollie Lho761bf1b2004-03-20 16:46:10 +0000142 unprotect_28sf040(bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000143
Uwe Hermanna502dce2007-10-17 23:55:15 +0000144 printf("Programming page: ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000145 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000146 /* erase the page before programming */
147 erase_sector_28sf040(bios, i * page_size);
148
149 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000150 printf("%04d at address: 0x%08x", i, i * page_size);
151 write_sector_28sf040(bios, buf + i * page_size,
152 bios + i * page_size, page_size);
Ollie Lho8b8897a2004-03-27 00:18:15 +0000153 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000154 }
155 printf("\n");
156
Ollie Lho761bf1b2004-03-20 16:46:10 +0000157 protect_28sf040(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000158
Uwe Hermannffec5f32007-08-23 16:08:21 +0000159 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000160}