Uwe Hermann | ddd5c9e | 2010-02-21 21:17:00 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | #include <stdlib.h> |
| 22 | #include <string.h> |
| 23 | #include <sys/types.h> |
| 24 | #include "flash.h" |
| 25 | |
| 26 | #define BIOS_ROM_ADDR 0x90 |
| 27 | #define BIOS_ROM_DATA 0x94 |
| 28 | |
| 29 | #define REG_FLASH_ACCESS 0x58 |
| 30 | |
| 31 | #define PCI_VENDOR_ID_HPT 0x1103 |
| 32 | |
| 33 | struct pcidev_status ata_hpt[] = { |
Michael Karcher | 8448639 | 2010-02-24 00:04:40 +0000 | [diff] [blame] | 34 | {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"}, |
| 35 | {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"}, |
| 36 | {0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"}, |
Uwe Hermann | ddd5c9e | 2010-02-21 21:17:00 +0000 | [diff] [blame] | 37 | |
| 38 | {}, |
| 39 | }; |
| 40 | |
| 41 | int atahpt_init(void) |
| 42 | { |
| 43 | uint32_t reg32; |
| 44 | |
| 45 | get_io_perms(); |
| 46 | |
| 47 | io_base_addr = pcidev_init(PCI_VENDOR_ID_HPT, PCI_BASE_ADDRESS_4, |
| 48 | ata_hpt, programmer_param); |
| 49 | |
| 50 | /* Enable flash access. */ |
| 51 | reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); |
| 52 | reg32 |= (1 << 24); |
| 53 | pci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32); |
| 54 | |
| 55 | buses_supported = CHIP_BUSTYPE_PARALLEL; |
| 56 | |
| 57 | return 0; |
| 58 | } |
| 59 | |
| 60 | int atahpt_shutdown(void) |
| 61 | { |
| 62 | uint32_t reg32; |
| 63 | |
| 64 | /* Disable flash access again. */ |
| 65 | reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); |
| 66 | reg32 &= ~(1 << 24); |
| 67 | pci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32); |
| 68 | |
| 69 | free(programmer_param); |
| 70 | pci_cleanup(pacc); |
| 71 | release_io_perms(); |
| 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | void atahpt_chip_writeb(uint8_t val, chipaddr addr) |
| 76 | { |
| 77 | OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); |
| 78 | OUTB(val, io_base_addr + BIOS_ROM_DATA); |
| 79 | } |
| 80 | |
| 81 | uint8_t atahpt_chip_readb(const chipaddr addr) |
| 82 | { |
| 83 | OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); |
| 84 | return INB(io_base_addr + BIOS_ROM_DATA); |
| 85 | } |