Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * Datasheet: |
| 23 | * - Name: Intel 82802AB/82802AC Firmware Hub (FWH) |
| 24 | * - URL: http://www.intel.com/design/chipsets/datashts/290658.htm |
| 25 | * - PDF: http://download.intel.com/design/chipsets/datashts/29065804.pdf |
| 26 | * - Order number: 290658-004 |
| 27 | */ |
| 28 | |
Claus Gindhart | ef30023 | 2008-04-24 09:07:57 +0000 | [diff] [blame] | 29 | #include <string.h> |
Carl-Daniel Hailfinger | 0bd2a2b | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 30 | #include <stdlib.h> |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 31 | #include "flash.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 32 | #include "chipdrivers.h" |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 33 | |
| 34 | // I need that Berkeley bit-map printer |
Sean Nelson | 28accc2 | 2010-03-19 18:47:06 +0000 | [diff] [blame] | 35 | void print_status_82802ab(uint8_t status) |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 36 | { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 37 | msg_cdbg("%s", status & 0x80 ? "Ready:" : "Busy:"); |
| 38 | msg_cdbg("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); |
| 39 | msg_cdbg("%s", status & 0x20 ? "BE ERROR:" : "BE OK:"); |
| 40 | msg_cdbg("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:"); |
| 41 | msg_cdbg("%s", status & 0x8 ? "VP ERR:" : "VPP OK:"); |
| 42 | msg_cdbg("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:"); |
| 43 | msg_cdbg("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:"); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 44 | } |
| 45 | |
| 46 | int probe_82802ab(struct flashchip *flash) |
| 47 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 48 | chipaddr bios = flash->virtual_memory; |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 49 | uint8_t id1, id2; |
Carl-Daniel Hailfinger | 12aa0be | 2010-03-22 23:47:38 +0000 | [diff] [blame] | 50 | uint8_t flashcontent1, flashcontent2; |
Michael Karcher | ad0010a | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 51 | int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0; |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 52 | |
Carl-Daniel Hailfinger | 4e9cebb | 2009-09-05 01:16:30 +0000 | [diff] [blame] | 53 | /* Reset to get a clean state */ |
| 54 | chip_writeb(0xFF, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 55 | programmer_delay(10); |
Carl-Daniel Hailfinger | 4e9cebb | 2009-09-05 01:16:30 +0000 | [diff] [blame] | 56 | |
| 57 | /* Enter ID mode */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 58 | chip_writeb(0x90, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 59 | programmer_delay(10); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 60 | |
Michael Karcher | ad0010a | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 61 | id1 = chip_readb(bios + (0x00 << shifted)); |
| 62 | id2 = chip_readb(bios + (0x01 << shifted)); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 63 | |
| 64 | /* Leave ID mode */ |
Carl-Daniel Hailfinger | 4e9cebb | 2009-09-05 01:16:30 +0000 | [diff] [blame] | 65 | chip_writeb(0xFF, bios); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 66 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 67 | programmer_delay(10); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 68 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 69 | msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 70 | |
Carl-Daniel Hailfinger | 12aa0be | 2010-03-22 23:47:38 +0000 | [diff] [blame] | 71 | if (!oddparity(id1)) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 72 | msg_cdbg(", id1 parity violation"); |
Carl-Daniel Hailfinger | 12aa0be | 2010-03-22 23:47:38 +0000 | [diff] [blame] | 73 | |
| 74 | /* Read the product ID location again. We should now see normal flash contents. */ |
Michael Karcher | ad0010a | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 75 | flashcontent1 = chip_readb(bios + (0x00 << shifted)); |
| 76 | flashcontent2 = chip_readb(bios + (0x01 << shifted)); |
Carl-Daniel Hailfinger | 12aa0be | 2010-03-22 23:47:38 +0000 | [diff] [blame] | 77 | |
| 78 | if (id1 == flashcontent1) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 79 | msg_cdbg(", id1 is normal flash content"); |
Carl-Daniel Hailfinger | 12aa0be | 2010-03-22 23:47:38 +0000 | [diff] [blame] | 80 | if (id2 == flashcontent2) |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 81 | msg_cdbg(", id2 is normal flash content"); |
Carl-Daniel Hailfinger | 12aa0be | 2010-03-22 23:47:38 +0000 | [diff] [blame] | 82 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 83 | msg_cdbg("\n"); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 84 | if (id1 != flash->manufacture_id || id2 != flash->model_id) |
| 85 | return 0; |
| 86 | |
Carl-Daniel Hailfinger | 81449a2 | 2010-03-15 03:48:42 +0000 | [diff] [blame] | 87 | if (flash->feature_bits & FEATURE_REGISTERMAP) |
| 88 | map_flash_registers(flash); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 89 | |
| 90 | return 1; |
| 91 | } |
| 92 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 93 | uint8_t wait_82802ab(chipaddr bios) |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 94 | { |
| 95 | uint8_t status; |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 96 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 97 | chip_writeb(0x70, bios); |
| 98 | if ((chip_readb(bios) & 0x80) == 0) { // it's busy |
| 99 | while ((chip_readb(bios) & 0x80) == 0) ; |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 100 | } |
| 101 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 102 | status = chip_readb(bios); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 103 | |
Carl-Daniel Hailfinger | 4e9cebb | 2009-09-05 01:16:30 +0000 | [diff] [blame] | 104 | /* Reset to get a clean state */ |
| 105 | chip_writeb(0xFF, bios); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 106 | |
| 107 | return status; |
| 108 | } |
| 109 | |
Sean Nelson | 28accc2 | 2010-03-19 18:47:06 +0000 | [diff] [blame] | 110 | int unlock_82802ab(struct flashchip *flash) |
| 111 | { |
| 112 | int i; |
| 113 | //chipaddr wrprotect = flash->virtual_registers + page + 2; |
| 114 | |
Sean Nelson | 4631319 | 2010-03-20 15:15:36 +0000 | [diff] [blame] | 115 | for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) |
Sean Nelson | 28accc2 | 2010-03-19 18:47:06 +0000 | [diff] [blame] | 116 | { |
| 117 | chip_writeb(0, flash->virtual_registers + i + 2); |
| 118 | } |
| 119 | |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize) |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 124 | { |
Sean Nelson | 5459637 | 2010-01-09 05:30:14 +0000 | [diff] [blame] | 125 | chipaddr bios = flash->virtual_memory; |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 126 | uint8_t status; |
| 127 | |
| 128 | // clear status register |
Sean Nelson | 5459637 | 2010-01-09 05:30:14 +0000 | [diff] [blame] | 129 | chip_writeb(0x50, bios + page); |
Stefan Reinauer | ab044b2 | 2009-09-16 08:26:59 +0000 | [diff] [blame] | 130 | |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 131 | // now start it |
Sean Nelson | 5459637 | 2010-01-09 05:30:14 +0000 | [diff] [blame] | 132 | chip_writeb(0x20, bios + page); |
| 133 | chip_writeb(0xd0, bios + page); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 134 | programmer_delay(10); |
Stefan Reinauer | ab044b2 | 2009-09-16 08:26:59 +0000 | [diff] [blame] | 135 | |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 136 | // now let's see what the register is |
Sean Nelson | 5459637 | 2010-01-09 05:30:14 +0000 | [diff] [blame] | 137 | status = wait_82802ab(bios); |
Sean Nelson | 28accc2 | 2010-03-19 18:47:06 +0000 | [diff] [blame] | 138 | print_status_82802ab(status); |
Stefan Reinauer | ab044b2 | 2009-09-16 08:26:59 +0000 | [diff] [blame] | 139 | |
Sean Nelson | 5459637 | 2010-01-09 05:30:14 +0000 | [diff] [blame] | 140 | if (check_erased_range(flash, page, pagesize)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 141 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 142 | return -1; |
Claus Gindhart | ef30023 | 2008-04-24 09:07:57 +0000 | [diff] [blame] | 143 | } |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 144 | msg_cinfo("DONE BLOCK 0x%x\n", page); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 145 | |
| 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | int erase_82802ab(struct flashchip *flash) |
| 150 | { |
| 151 | int i; |
| 152 | unsigned int total_size = flash->total_size * 1024; |
| 153 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 154 | msg_cspew("total_size is %d; flash->page_size is %d\n", |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 155 | total_size, flash->page_size); |
| 156 | for (i = 0; i < total_size; i += flash->page_size) |
Sean Nelson | 28accc2 | 2010-03-19 18:47:06 +0000 | [diff] [blame] | 157 | if (erase_block_82802ab(flash, i, flash->page_size)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 158 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 159 | return -1; |
| 160 | } |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 161 | msg_cinfo("DONE ERASE\n"); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 162 | |
| 163 | return 0; |
| 164 | } |
| 165 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 166 | void write_page_82802ab(chipaddr bios, uint8_t *src, |
| 167 | chipaddr dst, int page_size) |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 168 | { |
| 169 | int i; |
| 170 | |
| 171 | for (i = 0; i < page_size; i++) { |
| 172 | /* transfer data from source to destination */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 173 | chip_writeb(0x40, dst); |
| 174 | chip_writeb(*src++, dst++); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 175 | wait_82802ab(bios); |
| 176 | } |
| 177 | } |
| 178 | |
| 179 | int write_82802ab(struct flashchip *flash, uint8_t *buf) |
| 180 | { |
| 181 | int i; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 182 | chipaddr bios = flash->virtual_memory; |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 183 | |
Michael Karcher | ad0010a | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 184 | if (erase_flash(flash)) { |
| 185 | msg_cerr("ERASE FAILED!\n"); |
| 186 | return -1; |
Carl-Daniel Hailfinger | 0bd2a2b | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 187 | } |
Claus Gindhart | ef30023 | 2008-04-24 09:07:57 +0000 | [diff] [blame] | 188 | |
Michael Karcher | ad0010a | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 189 | msg_cinfo("Programming at: "); |
| 190 | for (i = 0; i < flash->total_size; i++) { |
| 191 | if ((i & 0x3) == 0) |
| 192 | msg_cinfo("address: 0x%08lx", (unsigned long)i * 1024); |
Claus Gindhart | ef30023 | 2008-04-24 09:07:57 +0000 | [diff] [blame] | 193 | |
Michael Karcher | ad0010a | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 194 | write_page_82802ab(bios, buf + i * 1024, bios + i * 1024, 1024); |
| 195 | |
| 196 | if ((i & 0x3) == 0) |
| 197 | msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 198 | } |
Michael Karcher | ad0010a | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 199 | |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 200 | msg_cinfo("DONE!\n"); |
Carl-Daniel Hailfinger | e7bcb19 | 2008-03-14 00:02:25 +0000 | [diff] [blame] | 201 | return 0; |
| 202 | } |
Sean Nelson | dee4a83 | 2010-03-22 04:39:31 +0000 | [diff] [blame] | 203 | |
Sean Nelson | 8864710 | 2010-03-22 06:57:02 +0000 | [diff] [blame] | 204 | int unlock_28f004s5(struct flashchip *flash) |
Sean Nelson | dee4a83 | 2010-03-22 04:39:31 +0000 | [diff] [blame] | 205 | { |
| 206 | chipaddr bios = flash->virtual_memory; |
Sean Nelson | 4e54de9 | 2010-03-22 07:03:26 +0000 | [diff] [blame] | 207 | uint8_t mcfg, bcfg, need_unlock = 0, can_unlock = 0; |
| 208 | int i; |
Sean Nelson | dee4a83 | 2010-03-22 04:39:31 +0000 | [diff] [blame] | 209 | |
| 210 | /* Clear status register */ |
| 211 | chip_writeb(0x50, bios); |
| 212 | |
| 213 | /* Read identifier codes */ |
| 214 | chip_writeb(0x90, bios); |
| 215 | |
| 216 | /* Read master lock-bit */ |
| 217 | mcfg = chip_readb(bios + 0x3); |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 218 | msg_cdbg("master lock is "); |
Sean Nelson | dee4a83 | 2010-03-22 04:39:31 +0000 | [diff] [blame] | 219 | if (mcfg) { |
| 220 | msg_cdbg("locked!\n"); |
| 221 | } else { |
| 222 | msg_cdbg("unlocked!\n"); |
| 223 | can_unlock = 1; |
| 224 | } |
| 225 | |
| 226 | /* Read block lock-bits */ |
| 227 | for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) { |
| 228 | bcfg = chip_readb(bios + i + 2); // read block lock config |
| 229 | msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un"); |
| 230 | if (bcfg) { |
| 231 | need_unlock = 1; |
| 232 | } |
| 233 | } |
| 234 | |
| 235 | /* Reset chip */ |
| 236 | chip_writeb(0xFF, bios); |
| 237 | |
| 238 | /* Unlock: clear block lock-bits, if needed */ |
| 239 | if (can_unlock && need_unlock) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 240 | msg_cdbg("Unlock: "); |
Sean Nelson | dee4a83 | 2010-03-22 04:39:31 +0000 | [diff] [blame] | 241 | chip_writeb(0x60, bios); |
| 242 | chip_writeb(0xD0, bios); |
| 243 | chip_writeb(0xFF, bios); |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 244 | msg_cdbg("Done!\n"); |
Sean Nelson | dee4a83 | 2010-03-22 04:39:31 +0000 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | /* Error: master locked or a block is locked */ |
| 248 | if (!can_unlock && need_unlock) { |
| 249 | msg_cerr("At least one block is locked and lockdown is active!\n"); |
| 250 | return -1; |
| 251 | } |
| 252 | |
| 253 | return 0; |
| 254 | } |