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Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
22 * Datasheet:
23 * - Name: Intel 82802AB/82802AC Firmware Hub (FWH)
24 * - URL: http://www.intel.com/design/chipsets/datashts/290658.htm
25 * - PDF: http://download.intel.com/design/chipsets/datashts/29065804.pdf
26 * - Order number: 290658-004
27 */
28
Claus Gindhartef300232008-04-24 09:07:57 +000029#include <string.h>
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +000030#include <stdlib.h>
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000031#include "flash.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000032#include "chipdrivers.h"
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000033
34// I need that Berkeley bit-map printer
Sean Nelson28accc22010-03-19 18:47:06 +000035void print_status_82802ab(uint8_t status)
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000036{
Sean Nelsoned479d22010-03-24 23:14:32 +000037 msg_cdbg("%s", status & 0x80 ? "Ready:" : "Busy:");
38 msg_cdbg("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
39 msg_cdbg("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
40 msg_cdbg("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
41 msg_cdbg("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
42 msg_cdbg("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
43 msg_cdbg("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000044}
45
46int probe_82802ab(struct flashchip *flash)
47{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000048 chipaddr bios = flash->virtual_memory;
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000049 uint8_t id1, id2;
Carl-Daniel Hailfinger12aa0be2010-03-22 23:47:38 +000050 uint8_t flashcontent1, flashcontent2;
Michael Karcherad0010a2010-04-03 10:27:08 +000051 int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0;
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000052
Carl-Daniel Hailfinger4e9cebb2009-09-05 01:16:30 +000053 /* Reset to get a clean state */
54 chip_writeb(0xFF, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000055 programmer_delay(10);
Carl-Daniel Hailfinger4e9cebb2009-09-05 01:16:30 +000056
57 /* Enter ID mode */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000058 chip_writeb(0x90, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000059 programmer_delay(10);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000060
Michael Karcherad0010a2010-04-03 10:27:08 +000061 id1 = chip_readb(bios + (0x00 << shifted));
62 id2 = chip_readb(bios + (0x01 << shifted));
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000063
64 /* Leave ID mode */
Carl-Daniel Hailfinger4e9cebb2009-09-05 01:16:30 +000065 chip_writeb(0xFF, bios);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000066
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000067 programmer_delay(10);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000068
Sean Nelsoned479d22010-03-24 23:14:32 +000069 msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000070
Carl-Daniel Hailfinger12aa0be2010-03-22 23:47:38 +000071 if (!oddparity(id1))
Sean Nelsoned479d22010-03-24 23:14:32 +000072 msg_cdbg(", id1 parity violation");
Carl-Daniel Hailfinger12aa0be2010-03-22 23:47:38 +000073
74 /* Read the product ID location again. We should now see normal flash contents. */
Michael Karcherad0010a2010-04-03 10:27:08 +000075 flashcontent1 = chip_readb(bios + (0x00 << shifted));
76 flashcontent2 = chip_readb(bios + (0x01 << shifted));
Carl-Daniel Hailfinger12aa0be2010-03-22 23:47:38 +000077
78 if (id1 == flashcontent1)
Sean Nelsoned479d22010-03-24 23:14:32 +000079 msg_cdbg(", id1 is normal flash content");
Carl-Daniel Hailfinger12aa0be2010-03-22 23:47:38 +000080 if (id2 == flashcontent2)
Sean Nelsoned479d22010-03-24 23:14:32 +000081 msg_cdbg(", id2 is normal flash content");
Carl-Daniel Hailfinger12aa0be2010-03-22 23:47:38 +000082
Sean Nelsoned479d22010-03-24 23:14:32 +000083 msg_cdbg("\n");
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000084 if (id1 != flash->manufacture_id || id2 != flash->model_id)
85 return 0;
86
Carl-Daniel Hailfinger81449a22010-03-15 03:48:42 +000087 if (flash->feature_bits & FEATURE_REGISTERMAP)
88 map_flash_registers(flash);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000089
90 return 1;
91}
92
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000093uint8_t wait_82802ab(chipaddr bios)
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000094{
95 uint8_t status;
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +000096
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000097 chip_writeb(0x70, bios);
98 if ((chip_readb(bios) & 0x80) == 0) { // it's busy
99 while ((chip_readb(bios) & 0x80) == 0) ;
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000100 }
101
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000102 status = chip_readb(bios);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000103
Carl-Daniel Hailfinger4e9cebb2009-09-05 01:16:30 +0000104 /* Reset to get a clean state */
105 chip_writeb(0xFF, bios);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000106
107 return status;
108}
109
Sean Nelson28accc22010-03-19 18:47:06 +0000110int unlock_82802ab(struct flashchip *flash)
111{
112 int i;
113 //chipaddr wrprotect = flash->virtual_registers + page + 2;
114
Sean Nelson46313192010-03-20 15:15:36 +0000115 for (i = 0; i < flash->total_size * 1024; i+= flash->page_size)
Sean Nelson28accc22010-03-19 18:47:06 +0000116 {
117 chip_writeb(0, flash->virtual_registers + i + 2);
118 }
119
120 return 0;
121}
122
123int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize)
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000124{
Sean Nelson54596372010-01-09 05:30:14 +0000125 chipaddr bios = flash->virtual_memory;
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000126 uint8_t status;
127
128 // clear status register
Sean Nelson54596372010-01-09 05:30:14 +0000129 chip_writeb(0x50, bios + page);
Stefan Reinauerab044b22009-09-16 08:26:59 +0000130
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000131 // now start it
Sean Nelson54596372010-01-09 05:30:14 +0000132 chip_writeb(0x20, bios + page);
133 chip_writeb(0xd0, bios + page);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000134 programmer_delay(10);
Stefan Reinauerab044b22009-09-16 08:26:59 +0000135
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000136 // now let's see what the register is
Sean Nelson54596372010-01-09 05:30:14 +0000137 status = wait_82802ab(bios);
Sean Nelson28accc22010-03-19 18:47:06 +0000138 print_status_82802ab(status);
Stefan Reinauerab044b22009-09-16 08:26:59 +0000139
Sean Nelson54596372010-01-09 05:30:14 +0000140 if (check_erased_range(flash, page, pagesize)) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000141 msg_cerr("ERASE FAILED!\n");
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000142 return -1;
Claus Gindhartef300232008-04-24 09:07:57 +0000143 }
Sean Nelsoned479d22010-03-24 23:14:32 +0000144 msg_cinfo("DONE BLOCK 0x%x\n", page);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000145
146 return 0;
147}
148
149int erase_82802ab(struct flashchip *flash)
150{
151 int i;
152 unsigned int total_size = flash->total_size * 1024;
153
Sean Nelsoned479d22010-03-24 23:14:32 +0000154 msg_cspew("total_size is %d; flash->page_size is %d\n",
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000155 total_size, flash->page_size);
156 for (i = 0; i < total_size; i += flash->page_size)
Sean Nelson28accc22010-03-19 18:47:06 +0000157 if (erase_block_82802ab(flash, i, flash->page_size)) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000158 msg_cerr("ERASE FAILED!\n");
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000159 return -1;
160 }
Sean Nelsoned479d22010-03-24 23:14:32 +0000161 msg_cinfo("DONE ERASE\n");
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000162
163 return 0;
164}
165
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000166void write_page_82802ab(chipaddr bios, uint8_t *src,
167 chipaddr dst, int page_size)
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000168{
169 int i;
170
171 for (i = 0; i < page_size; i++) {
172 /* transfer data from source to destination */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000173 chip_writeb(0x40, dst);
174 chip_writeb(*src++, dst++);
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000175 wait_82802ab(bios);
176 }
177}
178
179int write_82802ab(struct flashchip *flash, uint8_t *buf)
180{
181 int i;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000182 chipaddr bios = flash->virtual_memory;
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000183
Michael Karcherad0010a2010-04-03 10:27:08 +0000184 if (erase_flash(flash)) {
185 msg_cerr("ERASE FAILED!\n");
186 return -1;
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000187 }
Claus Gindhartef300232008-04-24 09:07:57 +0000188
Michael Karcherad0010a2010-04-03 10:27:08 +0000189 msg_cinfo("Programming at: ");
190 for (i = 0; i < flash->total_size; i++) {
191 if ((i & 0x3) == 0)
192 msg_cinfo("address: 0x%08lx", (unsigned long)i * 1024);
Claus Gindhartef300232008-04-24 09:07:57 +0000193
Michael Karcherad0010a2010-04-03 10:27:08 +0000194 write_page_82802ab(bios, buf + i * 1024, bios + i * 1024, 1024);
195
196 if ((i & 0x3) == 0)
197 msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000198 }
Michael Karcherad0010a2010-04-03 10:27:08 +0000199
Sean Nelsoned479d22010-03-24 23:14:32 +0000200 msg_cinfo("DONE!\n");
Carl-Daniel Hailfingere7bcb192008-03-14 00:02:25 +0000201 return 0;
202}
Sean Nelsondee4a832010-03-22 04:39:31 +0000203
Sean Nelson88647102010-03-22 06:57:02 +0000204int unlock_28f004s5(struct flashchip *flash)
Sean Nelsondee4a832010-03-22 04:39:31 +0000205{
206 chipaddr bios = flash->virtual_memory;
Sean Nelson4e54de92010-03-22 07:03:26 +0000207 uint8_t mcfg, bcfg, need_unlock = 0, can_unlock = 0;
208 int i;
Sean Nelsondee4a832010-03-22 04:39:31 +0000209
210 /* Clear status register */
211 chip_writeb(0x50, bios);
212
213 /* Read identifier codes */
214 chip_writeb(0x90, bios);
215
216 /* Read master lock-bit */
217 mcfg = chip_readb(bios + 0x3);
Sean Nelsoned479d22010-03-24 23:14:32 +0000218 msg_cdbg("master lock is ");
Sean Nelsondee4a832010-03-22 04:39:31 +0000219 if (mcfg) {
220 msg_cdbg("locked!\n");
221 } else {
222 msg_cdbg("unlocked!\n");
223 can_unlock = 1;
224 }
225
226 /* Read block lock-bits */
227 for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) {
228 bcfg = chip_readb(bios + i + 2); // read block lock config
229 msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un");
230 if (bcfg) {
231 need_unlock = 1;
232 }
233 }
234
235 /* Reset chip */
236 chip_writeb(0xFF, bios);
237
238 /* Unlock: clear block lock-bits, if needed */
239 if (can_unlock && need_unlock) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000240 msg_cdbg("Unlock: ");
Sean Nelsondee4a832010-03-22 04:39:31 +0000241 chip_writeb(0x60, bios);
242 chip_writeb(0xD0, bios);
243 chip_writeb(0xFF, bios);
Sean Nelsoned479d22010-03-24 23:14:32 +0000244 msg_cdbg("Done!\n");
Sean Nelsondee4a832010-03-22 04:39:31 +0000245 }
246
247 /* Error: master locked or a block is locked */
248 if (!can_unlock && need_unlock) {
249 msg_cerr("At least one block is locked and lockdown is active!\n");
250 return -1;
251 }
252
253 return 0;
254}