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Yinghai Luca782972007-01-22 20:21:17 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Yinghai Luca782972007-01-22 20:21:17 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2005-2007 coresystems GmbH
Yinghai Luca782972007-01-22 20:21:17 +00006 *
Uwe Hermannd1107642007-08-29 17:52:32 +00007 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
Yinghai Luca782972007-01-22 20:21:17 +000011 *
Uwe Hermannd1107642007-08-29 17:52:32 +000012 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Yinghai Luca782972007-01-22 20:21:17 +000016 *
Uwe Hermannd1107642007-08-29 17:52:32 +000017 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Yinghai Luca782972007-01-22 20:21:17 +000020 */
21
22#include <errno.h>
23#include <fcntl.h>
24#include <sys/mman.h>
Yinghai Luca782972007-01-22 20:21:17 +000025#include <stdlib.h>
Yinghai Luca782972007-01-22 20:21:17 +000026#include "flash.h"
Yinghai Luca782972007-01-22 20:21:17 +000027
28#define SECTOR_ERASE 0x30
29#define BLOCK_ERASE 0x20
30#define ERASE 0xD0
31#define AUTO_PGRM 0x10
32#define RESET 0xFF
33#define READ_ID 0x90
34#define READ_STATUS 0x70
35#define CLEAR_STATUS 0x50
36
37#define STATUS_BPS (1 << 1)
38#define STATUS_ESS (1 << 6)
39#define STATUS_WSMS (1 << 7)
40
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000041static __inline__ int write_lockbits_49lfxxxc(chipaddr bios, int size,
Uwe Hermanna7e05482007-05-09 10:17:44 +000042 unsigned char bits)
Yinghai Luca782972007-01-22 20:21:17 +000043{
44 int i, left = size;
45 unsigned long address;
46
47 //printf("bios=0x%08lx\n", (unsigned long)bios);
48 for (i = 0; left > 65536; i++, left -= 65536) {
49 //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) );
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000050 chip_writeb(bits, bios + (i * 65536) + 2);
Yinghai Luca782972007-01-22 20:21:17 +000051 }
52 address = i * 65536;
Uwe Hermanna7e05482007-05-09 10:17:44 +000053 //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000054 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000055 address += 32768;
Uwe Hermanna7e05482007-05-09 10:17:44 +000056 //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000057 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000058 address += 8192;
Uwe Hermanna7e05482007-05-09 10:17:44 +000059 //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000060 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000061 address += 8192;
Uwe Hermanna7e05482007-05-09 10:17:44 +000062 //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000063 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000064
Uwe Hermannffec5f32007-08-23 16:08:21 +000065 return 0;
Yinghai Luca782972007-01-22 20:21:17 +000066}
67
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000068static __inline__ int erase_sector_49lfxxxc(chipaddr bios,
Uwe Hermanna7e05482007-05-09 10:17:44 +000069 unsigned long address)
Yinghai Luca782972007-01-22 20:21:17 +000070{
71 unsigned char status;
72
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000073 chip_writeb(SECTOR_ERASE, bios);
74 chip_writeb(ERASE, bios + address);
Yinghai Luca782972007-01-22 20:21:17 +000075
76 do {
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000077 status = chip_readb(bios);
Yinghai Luca782972007-01-22 20:21:17 +000078 if (status & (STATUS_ESS | STATUS_BPS)) {
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000079 printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", bios + address, status);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000080 chip_writeb(CLEAR_STATUS, bios);
Uwe Hermanna7e05482007-05-09 10:17:44 +000081 return (-1);
Yinghai Luca782972007-01-22 20:21:17 +000082 }
Uwe Hermanna7e05482007-05-09 10:17:44 +000083 } while (!(status & STATUS_WSMS));
Yinghai Luca782972007-01-22 20:21:17 +000084
Uwe Hermannffec5f32007-08-23 16:08:21 +000085 return 0;
Yinghai Luca782972007-01-22 20:21:17 +000086}
87
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000088static __inline__ int write_sector_49lfxxxc(chipaddr bios,
Uwe Hermanna7e05482007-05-09 10:17:44 +000089 uint8_t *src,
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000090 chipaddr dst,
Uwe Hermanna7e05482007-05-09 10:17:44 +000091 unsigned int page_size)
Yinghai Luca782972007-01-22 20:21:17 +000092{
93 int i;
94 unsigned char status;
95
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000096 chip_writeb(CLEAR_STATUS, bios);
Yinghai Luca782972007-01-22 20:21:17 +000097 for (i = 0; i < page_size; i++) {
98 /* transfer data from source to destination */
99 if (*src == 0xFF) {
100 dst++, src++;
101 /* If the data is 0xFF, don't program it */
102 continue;
103 }
104 /*issue AUTO PROGRAM command */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000105 chip_writeb(AUTO_PGRM, bios);
106 chip_writeb(*src++, dst++);
Yinghai Luca782972007-01-22 20:21:17 +0000107
108 do {
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000109 status = chip_readb(bios);
Yinghai Luca782972007-01-22 20:21:17 +0000110 if (status & (STATUS_ESS | STATUS_BPS)) {
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000111 printf("sector write FAILED at address=0x%08lx status=0x%01x\n", dst, status);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000112 chip_writeb(CLEAR_STATUS, bios);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000113 return (-1);
Yinghai Luca782972007-01-22 20:21:17 +0000114 }
115 } while (!(status & STATUS_WSMS));
116 }
117
Uwe Hermannffec5f32007-08-23 16:08:21 +0000118 return 0;
Yinghai Luca782972007-01-22 20:21:17 +0000119}
120
121int probe_49lfxxxc(struct flashchip *flash)
122{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000123 chipaddr bios = flash->virtual_memory;
Stefan Reinauerce532972007-05-23 17:20:56 +0000124
Yinghai Luca782972007-01-22 20:21:17 +0000125 uint8_t id1, id2;
Yinghai Luca782972007-01-22 20:21:17 +0000126
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000127 chip_writeb(RESET, bios);
Yinghai Luca782972007-01-22 20:21:17 +0000128
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000129 chip_writeb(READ_ID, bios);
130 id1 = chip_readb(bios);
131 id2 = chip_readb(bios + 0x01);
Yinghai Luca782972007-01-22 20:21:17 +0000132
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000133 chip_writeb(RESET, bios);
Yinghai Luca782972007-01-22 20:21:17 +0000134
Peter Stuge5cafc332009-01-25 23:52:45 +0000135 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000136
Yinghai Luca782972007-01-22 20:21:17 +0000137 if (!(id1 == flash->manufacture_id && id2 == flash->model_id))
138 return 0;
139
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000140 map_flash_registers(flash);
141
Yinghai Luca782972007-01-22 20:21:17 +0000142 return 1;
143}
144
145int erase_49lfxxxc(struct flashchip *flash)
146{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000147 chipaddr bios = flash->virtual_memory;
148 chipaddr registers = flash->virtual_registers;
Yinghai Luca782972007-01-22 20:21:17 +0000149 int i;
150 unsigned int total_size = flash->total_size * 1024;
151
Stefan Reinauerce532972007-05-23 17:20:56 +0000152 write_lockbits_49lfxxxc(registers, total_size, 0);
Yinghai Luca782972007-01-22 20:21:17 +0000153 for (i = 0; i < total_size; i += flash->page_size)
Uwe Hermanna7e05482007-05-09 10:17:44 +0000154 if (erase_sector_49lfxxxc(bios, i) != 0)
155 return (-1);
Yinghai Luca782972007-01-22 20:21:17 +0000156
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000157 chip_writeb(RESET, bios);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000158
159 return 0;
Yinghai Luca782972007-01-22 20:21:17 +0000160}
161
162int write_49lfxxxc(struct flashchip *flash, uint8_t *buf)
163{
164 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000165 int total_size = flash->total_size * 1024;
166 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000167 chipaddr bios = flash->virtual_memory;
Yinghai Luca782972007-01-22 20:21:17 +0000168
Stefan Reinauerce532972007-05-23 17:20:56 +0000169 write_lockbits_49lfxxxc(flash->virtual_registers, total_size, 0);
Uwe Hermanna502dce2007-10-17 23:55:15 +0000170 printf("Programming page: ");
Yinghai Luca782972007-01-22 20:21:17 +0000171 for (i = 0; i < total_size / page_size; i++) {
172 /* erase the page before programming */
173 erase_sector_49lfxxxc(bios, i * page_size);
174
175 /* write to the sector */
176 printf("%04d at address: 0x%08x", i, i * page_size);
177 write_sector_49lfxxxc(bios, buf + i * page_size,
Uwe Hermanna7e05482007-05-09 10:17:44 +0000178 bios + i * page_size, page_size);
Yinghai Luca782972007-01-22 20:21:17 +0000179 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
180 }
181 printf("\n");
182
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000183 chip_writeb(RESET, bios);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000184
185 return 0;
Yinghai Luca782972007-01-22 20:21:17 +0000186}