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Uwe Hermann34eae342009-09-02 23:27:45 +00001/*
2 * This file is part of the flashrom project.
3 *
Joerg Fischer4be25c72009-09-09 00:55:13 +00004 * Copyright (C) 2009 Joerg Fischer <turboj@web.de>
Uwe Hermann34eae342009-09-02 23:27:45 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Uwe Hermann34eae342009-09-02 23:27:45 +000015 */
16
17#include <stdlib.h>
Uwe Hermann34eae342009-09-02 23:27:45 +000018#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000019#include "programmer.h"
Thomas Heijligen74b4aa02021-12-14 17:52:30 +010020#include "hwaccess_physmap.h"
Thomas Heijligend96c97c2021-11-02 21:03:00 +010021#include "platform/pci.h"
Uwe Hermann34eae342009-09-02 23:27:45 +000022
23#define PCI_VENDOR_ID_DRKAISER 0x1803
24
25#define PCI_MAGIC_DRKAISER_ADDR 0x50
26#define PCI_MAGIC_DRKAISER_VALUE 0xa971
27
David Hendricks8bb20212011-06-14 01:35:36 +000028#define DRKAISER_MEMMAP_SIZE (1024 * 128)
29
Carl-Daniel Hailfingerfb2c4c32010-07-17 22:42:33 +000030/* Mask to restrict flash accesses to the 128kB memory window. */
31#define DRKAISER_MEMMAP_MASK ((1 << 17) - 1)
32
Thomas Heijligencc853d82021-05-04 15:32:17 +020033static const struct dev_entry drkaiser_pcidev[] = {
Michael Karcher84486392010-02-24 00:04:40 +000034 {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000035
36 {0},
Uwe Hermann34eae342009-09-02 23:27:45 +000037};
38
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000039static uint8_t *drkaiser_bar;
Uwe Hermann34eae342009-09-02 23:27:45 +000040
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000041static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
42 chipaddr addr);
43static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
44 const chipaddr addr);
Carl-Daniel Hailfingera5bcbce2014-07-19 22:03:29 +000045static const struct par_master par_master_drkaiser = {
Thomas Heijligen43040f22022-06-23 14:38:35 +020046 .chip_readb = drkaiser_chip_readb,
47 .chip_readw = fallback_chip_readw,
48 .chip_readl = fallback_chip_readl,
49 .chip_readn = fallback_chip_readn,
50 .chip_writeb = drkaiser_chip_writeb,
51 .chip_writew = fallback_chip_writew,
52 .chip_writel = fallback_chip_writel,
53 .chip_writen = fallback_chip_writen,
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000054};
55
Thomas Heijligencc853d82021-05-04 15:32:17 +020056static int drkaiser_init(void)
Uwe Hermann34eae342009-09-02 23:27:45 +000057{
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000058 struct pci_dev *dev = NULL;
Uwe Hermann34eae342009-09-02 23:27:45 +000059 uint32_t addr;
60
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000061 dev = pcidev_init(drkaiser_pcidev, PCI_BASE_ADDRESS_2);
62 if (!dev)
63 return 1;
64
65 addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2);
Niklas Söderlund89edf362013-08-23 23:29:23 +000066 if (!addr)
67 return 1;
Uwe Hermann34eae342009-09-02 23:27:45 +000068
69 /* Write magic register to enable flash write. */
Carl-Daniel Hailfingera2faddf2013-01-05 23:52:45 +000070 rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE);
Uwe Hermann34eae342009-09-02 23:27:45 +000071
Stefan Taunerc0aaf952011-05-19 02:58:17 +000072 /* Map 128kB flash memory window. */
Stefan Tauner7fb5aa02013-08-14 15:48:44 +000073 drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE);
74 if (drkaiser_bar == ERROR_PTR)
David Hendricks8bb20212011-06-14 01:35:36 +000075 return 1;
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000076
77 max_rom_decode.parallel = 128 * 1024;
Anastasia Klimchukc1f2a472021-08-27 15:47:46 +100078 return register_par_master(&par_master_drkaiser, BUS_PARALLEL, NULL);
Uwe Hermann34eae342009-09-02 23:27:45 +000079}
80
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000081static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
82 chipaddr addr)
Uwe Hermann34eae342009-09-02 23:27:45 +000083{
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +000084 pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
Uwe Hermann34eae342009-09-02 23:27:45 +000085}
86
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000087static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
88 const chipaddr addr)
Uwe Hermann34eae342009-09-02 23:27:45 +000089{
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +000090 return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
Uwe Hermann34eae342009-09-02 23:27:45 +000091}
Thomas Heijligencc853d82021-05-04 15:32:17 +020092
93const struct programmer_entry programmer_drkaiser = {
94 .name = "drkaiser",
95 .type = PCI,
96 .devs.dev = drkaiser_pcidev,
97 .init = drkaiser_init,
Thomas Heijligencc853d82021-05-04 15:32:17 +020098};