blob: cb55d76ef021145e0063fdbc31ceea3f871fca49 [file] [log] [blame]
Ronald G. Minnichb1934902002-06-11 19:15:55 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnichb1934902002-06-11 19:15:55 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnichb1934902002-06-11 19:15:55 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnichb1934902002-06-11 19:15:55 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnichb1934902002-06-11 19:15:55 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnichb1934902002-06-11 19:15:55 +000019 */
20
21#include "flash.h"
Ronald G. Minnichb1934902002-06-11 19:15:55 +000022
Uwe Hermann51582f22007-08-23 10:20:40 +000023void protect_m29f400bt(volatile uint8_t *bios)
24{
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000025 chip_writeb(0xAA, bios + 0xAAA);
26 chip_writeb(0x55, bios + 0x555);
27 chip_writeb(0xA0, bios + 0xAAA);
Uwe Hermann51582f22007-08-23 10:20:40 +000028
29 usleep(200);
30}
31
32void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
33 volatile uint8_t *dst, int page_size)
34{
35 int i;
36
37 for (i = 0; i < page_size; i++) {
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000038 chip_writeb(0xAA, bios + 0xAAA);
39 chip_writeb(0x55, bios + 0x555);
40 chip_writeb(0xA0, bios + 0xAAA);
Uwe Hermann51582f22007-08-23 10:20:40 +000041
42 /* transfer data from source to destination */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000043 chip_writeb(*src, dst);
Uwe Hermann51582f22007-08-23 10:20:40 +000044 //*(volatile char *) (bios) = 0xF0;
45 //usleep(5);
Uwe Hermannfd374142007-08-23 15:20:38 +000046 toggle_ready_jedec(dst);
Uwe Hermann51582f22007-08-23 10:20:40 +000047 printf
48 ("Value in the flash at address %p = %#x, want %#x\n",
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000049 (uint8_t *) (dst - bios), chip_readb(dst), *src);
Uwe Hermann51582f22007-08-23 10:20:40 +000050 dst++;
51 src++;
52 }
53}
54
Ollie Lho761bf1b2004-03-20 16:46:10 +000055int probe_m29f400bt(struct flashchip *flash)
Ronald G. Minnichb1934902002-06-11 19:15:55 +000056{
Stefan Reinauerce532972007-05-23 17:20:56 +000057 volatile uint8_t *bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000058 uint8_t id1, id2;
Ronald G. Minnichb1934902002-06-11 19:15:55 +000059
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000060 chip_writeb(0xAA, bios + 0xAAA);
61 chip_writeb(0x55, bios + 0x555);
62 chip_writeb(0x90, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000063
64 myusec_delay(10);
65
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000066 id1 = chip_readb(bios);
Carl-Daniel Hailfingerc2a18452007-12-31 01:18:26 +000067 /* The data sheet says id2 is at (bios + 0x01) and id2 listed in
68 * flash.h does not match. It should be possible to use JEDEC probe.
69 */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000070 id2 = chip_readb(bios + 0x02);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000071
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000072 chip_writeb(0xAA, bios + 0xAAA);
73 chip_writeb(0x55, bios + 0x555);
74 chip_writeb(0xF0, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000075
76 myusec_delay(10);
Ronald G. Minnichd4228fd2003-02-28 17:21:38 +000077
Peter Stuge5cafc332009-01-25 23:52:45 +000078 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Ronald G. Minnichd4228fd2003-02-28 17:21:38 +000079
Ronald G. Minnichb1934902002-06-11 19:15:55 +000080 if (id1 == flash->manufacture_id && id2 == flash->model_id)
81 return 1;
82
83 return 0;
84}
85
Ollie Lho761bf1b2004-03-20 16:46:10 +000086int erase_m29f400bt(struct flashchip *flash)
Ronald G. Minnichb1934902002-06-11 19:15:55 +000087{
Stefan Reinauerce532972007-05-23 17:20:56 +000088 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnichb1934902002-06-11 19:15:55 +000089
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000090 chip_writeb(0xAA, bios + 0xAAA);
91 chip_writeb(0x55, bios + 0x555);
92 chip_writeb(0x80, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000093
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000094 chip_writeb(0xAA, bios + 0xAAA);
95 chip_writeb(0x55, bios + 0x555);
96 chip_writeb(0x10, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +000097
98 myusec_delay(10);
Uwe Hermannfd374142007-08-23 15:20:38 +000099 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000100
Uwe Hermannffec5f32007-08-23 16:08:21 +0000101 return 0;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000102}
103
Ollie Lho184a4042005-11-26 21:55:36 +0000104int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst)
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000105{
106
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000107 chip_writeb(0xAA, bios + 0xAAA);
108 chip_writeb(0x55, bios + 0x555);
109 chip_writeb(0x80, bios + 0xAAA);
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000110
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000111 chip_writeb(0xAA, bios + 0xAAA);
112 chip_writeb(0x55, bios + 0x555);
Ollie Lho184a4042005-11-26 21:55:36 +0000113 //*(volatile uint8_t *) (bios + 0xAAA) = 0x10;
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000114 chip_writeb(0x30, dst);
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000115
116 myusec_delay(10);
Uwe Hermannfd374142007-08-23 15:20:38 +0000117 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000118
Uwe Hermannffec5f32007-08-23 16:08:21 +0000119 return 0;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000120}
121
Ollie Lho184a4042005-11-26 21:55:36 +0000122int write_m29f400bt(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000123{
124 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000125 int total_size = flash->total_size * 1024;
126 int page_size = flash->page_size;
Stefan Reinauerce532972007-05-23 17:20:56 +0000127 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000128
129 //erase_m29f400bt (flash);
Uwe Hermanna502dce2007-10-17 23:55:15 +0000130 printf("Programming page:\n ");
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000131 /*********************************
132 *Pages for M29F400BT:
133 * 16 0x7c000 0x7ffff TOP
134 * 8 0x7a000 0x7bfff
135 * 8 0x78000 0x79fff
136 * 32 0x70000 0x77fff
137 * 64 0x60000 0x6ffff
138 * 64 0x50000 0x5ffff
139 * 64 0x40000 0x4ffff
140 *---------------------------------
141 * 64 0x30000 0x3ffff
142 * 64 0x20000 0x2ffff
143 * 64 0x10000 0x1ffff
144 * 64 0x00000 0x0ffff BOTTOM
145 *********************************/
Ollie Lho761bf1b2004-03-20 16:46:10 +0000146 printf("total_size/page_size = %d\n", total_size / page_size);
147 for (i = 0; i < (total_size / page_size) - 1; i++) {
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000148 printf("%04d at address: 0x%08x\n", i, i * page_size);
149 block_erase_m29f400bt(bios, bios + i * page_size);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000150 write_page_m29f400bt(bios, buf + i * page_size,
151 bios + i * page_size, page_size);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000152 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000153 }
154
Ollie Lho761bf1b2004-03-20 16:46:10 +0000155 printf("%04d at address: 0x%08x\n", 7, 0x70000);
156 block_erase_m29f400bt(bios, bios + 0x70000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000157 write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000, 32 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000158
159 printf("%04d at address: 0x%08x\n", 8, 0x78000);
160 block_erase_m29f400bt(bios, bios + 0x78000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000161 write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000, 8 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000162
163 printf("%04d at address: 0x%08x\n", 9, 0x7a000);
164 block_erase_m29f400bt(bios, bios + 0x7a000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000165 write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000, 8 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000166
167 printf("%04d at address: 0x%08x\n", 10, 0x7c000);
168 block_erase_m29f400bt(bios, bios + 0x7c000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000169 write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000170
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000171 printf("\n");
172 //protect_m29f400bt (bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000173
Uwe Hermannffec5f32007-08-23 16:08:21 +0000174 return 0;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000175}
176
Stefan Reinauere3f3e2e2008-01-18 15:33:10 +0000177int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000178{
Stefan Reinauerce532972007-05-23 17:20:56 +0000179 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000180
Uwe Hermanna502dce2007-10-17 23:55:15 +0000181 printf("Programming page:\n ");
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000182 /*********************************
183 *Pages for M29F400BT:
184 * 16 0x7c000 0x7ffff TOP
185 * 8 0x7a000 0x7bfff
186 * 8 0x78000 0x79fff
187 * 32 0x70000 0x77fff
188 * 64 0x60000 0x6ffff
189 * 64 0x50000 0x5ffff
190 * 64 0x40000 0x4ffff
191 *---------------------------------
192 * 64 0x30000 0x3ffff
193 * 64 0x20000 0x2ffff
194 * 64 0x10000 0x1ffff
195 * 64 0x00000 0x0ffff BOTTOM
196 *********************************/
Ollie Lho761bf1b2004-03-20 16:46:10 +0000197 printf("%04d at address: 0x%08x\n", 7, 0x00000);
198 block_erase_m29f400bt(bios, bios + 0x00000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000199 write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000200
201 printf("%04d at address: 0x%08x\n", 7, 0x10000);
202 block_erase_m29f400bt(bios, bios + 0x10000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000203 write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000204
205 printf("%04d at address: 0x%08x\n", 7, 0x20000);
206 block_erase_m29f400bt(bios, bios + 0x20000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000207 write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000208
209 printf("%04d at address: 0x%08x\n", 7, 0x30000);
210 block_erase_m29f400bt(bios, bios + 0x30000);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000211 write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000212
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000213 printf("\n");
214 //protect_m29f400bt (bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000215
Uwe Hermannffec5f32007-08-23 16:08:21 +0000216 return 0;
Ronald G. Minnichb1934902002-06-11 19:15:55 +0000217}