Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 21 | #include <stdlib.h> |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 22 | #include "flash.h" |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 23 | |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 24 | // I need that Berkeley bit-map printer |
| 25 | void print_lhf00l04_status(uint8_t status) |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 26 | { |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 27 | printf("%s", status & 0x80 ? "Ready:" : "Busy:"); |
| 28 | printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:"); |
| 29 | printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:"); |
| 30 | printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:"); |
| 31 | printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:"); |
| 32 | printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:"); |
| 33 | printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:"); |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 34 | } |
| 35 | |
| 36 | int probe_lhf00l04(struct flashchip *flash) |
| 37 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 38 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 39 | uint8_t id1, id2; |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 40 | |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 41 | #if 0 |
Stefan Reinauer | ce53297 | 2007-05-23 17:20:56 +0000 | [diff] [blame] | 42 | /* Enter ID mode */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 43 | chip_writeb(0xAA, bios + 0x5555); |
| 44 | chip_writeb(0x55, bios + 0x2AAA); |
| 45 | chip_writeb(0x90, bios + 0x5555); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 46 | #endif |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 47 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 48 | chip_writeb(0xff, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 49 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 50 | chip_writeb(0x90, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 51 | programmer_delay(10); |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 52 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 53 | id1 = chip_readb(bios); |
| 54 | id2 = chip_readb(bios + 0x01); |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 55 | |
Stefan Reinauer | ce53297 | 2007-05-23 17:20:56 +0000 | [diff] [blame] | 56 | /* Leave ID mode */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 57 | chip_writeb(0xAA, bios + 0x5555); |
| 58 | chip_writeb(0x55, bios + 0x2AAA); |
| 59 | chip_writeb(0xF0, bios + 0x5555); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 60 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 61 | programmer_delay(10); |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 62 | |
Peter Stuge | 5cafc33 | 2009-01-25 23:52:45 +0000 | [diff] [blame] | 63 | printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 64 | |
Uwe Hermann | a880885 | 2007-05-24 19:17:29 +0000 | [diff] [blame] | 65 | if (id1 != flash->manufacture_id || id2 != flash->model_id) |
Stefan Reinauer | ff4f197 | 2007-05-24 08:48:10 +0000 | [diff] [blame] | 66 | return 0; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 67 | |
Stefan Reinauer | ff4f197 | 2007-05-24 08:48:10 +0000 | [diff] [blame] | 68 | map_flash_registers(flash); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 69 | |
Stefan Reinauer | ff4f197 | 2007-05-24 08:48:10 +0000 | [diff] [blame] | 70 | return 1; |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 71 | } |
| 72 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 73 | uint8_t wait_lhf00l04(chipaddr bios) |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 74 | { |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 75 | uint8_t status; |
| 76 | uint8_t id1, id2; |
| 77 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 78 | chip_writeb(0x70, bios); |
| 79 | if ((chip_readb(bios) & 0x80) == 0) { // it's busy |
| 80 | while ((chip_readb(bios) & 0x80) == 0) ; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 81 | } |
| 82 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 83 | status = chip_readb(bios); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 84 | |
| 85 | // put another command to get out of status register mode |
| 86 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 87 | chip_writeb(0x90, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 88 | programmer_delay(10); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 89 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 90 | id1 = chip_readb(bios); |
| 91 | id2 = chip_readb(bios + 0x01); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 92 | |
| 93 | // this is needed to jam it out of "read id" mode |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 94 | chip_writeb(0xAA, bios + 0x5555); |
| 95 | chip_writeb(0x55, bios + 0x2AAA); |
| 96 | chip_writeb(0xF0, bios + 0x5555); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 97 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 98 | return status; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 99 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 100 | |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 101 | int erase_lhf00l04_block(struct flashchip *flash, int offset) |
| 102 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 103 | chipaddr bios = flash->virtual_memory + offset; |
| 104 | chipaddr wrprotect = flash->virtual_registers + offset + 2; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 105 | uint8_t status; |
| 106 | |
| 107 | // clear status register |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 108 | chip_writeb(0x50, bios); |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 109 | printf("Erase at 0x%lx\n", bios); |
Stefan Reinauer | ce53297 | 2007-05-23 17:20:56 +0000 | [diff] [blame] | 110 | status = wait_lhf00l04(flash->virtual_memory); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 111 | print_lhf00l04_status(status); |
| 112 | // clear write protect |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 113 | printf("write protect is at 0x%lx\n", (wrprotect)); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 114 | printf("write protect is 0x%x\n", chip_readb(wrprotect)); |
| 115 | chip_writeb(0, wrprotect); |
| 116 | printf("write protect is 0x%x\n", chip_readb(wrprotect)); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 117 | |
| 118 | // now start it |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 119 | chip_writeb(0x20, bios); |
| 120 | chip_writeb(0xd0, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 121 | programmer_delay(10); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 122 | // now let's see what the register is |
Stefan Reinauer | ce53297 | 2007-05-23 17:20:56 +0000 | [diff] [blame] | 123 | status = wait_lhf00l04(flash->virtual_memory); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 124 | print_lhf00l04_status(status); |
| 125 | printf("DONE BLOCK 0x%x\n", offset); |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 126 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 127 | if (check_erased_range(flash, offset, flash->page_size)) { |
| 128 | fprintf(stderr, "ERASE FAILED!\n"); |
| 129 | return -1; |
| 130 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 131 | return 0; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 132 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 133 | |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 134 | int erase_lhf00l04(struct flashchip *flash) |
| 135 | { |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 136 | int i; |
| 137 | unsigned int total_size = flash->total_size * 1024; |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 138 | |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 139 | printf("total_size is %d; flash->page_size is %d\n", |
| 140 | total_size, flash->page_size); |
| 141 | for (i = 0; i < total_size; i += flash->page_size) |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 142 | if (erase_lhf00l04_block(flash, i)) { |
| 143 | fprintf(stderr, "ERASE FAILED!\n"); |
| 144 | return -1; |
| 145 | } |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 146 | printf("DONE ERASE\n"); |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 147 | |
| 148 | return 0; |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 149 | } |
| 150 | |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 151 | void write_page_lhf00l04(chipaddr bios, uint8_t *src, |
| 152 | chipaddr dst, int page_size) |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 153 | { |
| 154 | int i; |
| 155 | |
| 156 | for (i = 0; i < page_size; i++) { |
| 157 | /* transfer data from source to destination */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 158 | chip_writeb(0x40, dst); |
| 159 | chip_writeb(*src++, dst++); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 160 | wait_lhf00l04(bios); |
| 161 | } |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 162 | } |
| 163 | |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 164 | int write_lhf00l04(struct flashchip *flash, uint8_t *buf) |
| 165 | { |
| 166 | int i; |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 167 | int total_size = flash->total_size * 1024; |
| 168 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 169 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 170 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 171 | if (erase_lhf00l04(flash)) { |
| 172 | fprintf(stderr, "ERASE FAILED!\n"); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 173 | return -1; |
| 174 | } |
Uwe Hermann | a502dce | 2007-10-17 23:55:15 +0000 | [diff] [blame] | 175 | printf("Programming page: "); |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 176 | for (i = 0; i < total_size / page_size; i++) { |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 177 | printf("%04d at address: 0x%08x", i, i * page_size); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 178 | write_page_lhf00l04(bios, buf + i * page_size, |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 179 | bios + i * page_size, page_size); |
| 180 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 181 | } |
| 182 | printf("\n"); |
Uwe Hermann | fd37414 | 2007-08-23 15:20:38 +0000 | [diff] [blame] | 183 | protect_jedec(bios); |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 184 | |
| 185 | return 0; |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 186 | } |