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Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000020/* Driver for various LPT adapters.
21 *
22 * This driver uses non-portable direct I/O port accesses which won't work on
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000023 * any non-x86 platform, and even on x86 there is a high chance there will be
24 * collisions with any loaded parallel port drivers.
25 * The big advantage of direct port I/O is OS independence and speed because
26 * most OS parport drivers will perform many unnecessary accesses although
27 * this driver just treats the parallel port as a GPIO set.
28 */
29#if defined(__i386__) || defined(__x86_64__)
30
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +000031#include <stdlib.h>
Carl-Daniel Hailfinger1c6d2ff2012-08-27 00:44:42 +000032#include <strings.h>
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +000033#include <string.h>
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000034#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000035#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000036#include "hwaccess.h"
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000037
38/* We have two sets of pins, out and in. The numbers for both sets are
39 * independent and are bitshift values, not real pin numbers.
Paul Menzel018d4822011-10-21 12:33:07 +000040 * Default settings are for the RayeR hardware.
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +000041 */
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +000042
43struct rayer_programmer {
44 const char *type;
45 const enum test_state status;
46 const char *description;
47 const void *dev_data;
48};
49
50struct rayer_pinout {
51 uint8_t cs_bit;
52 uint8_t sck_bit;
53 uint8_t mosi_bit;
54 uint8_t miso_bit;
55 void (*preinit)(const void *);
56 int (*shutdown)(void *);
57};
58
59static const struct rayer_pinout rayer_spipgm = {
60 .cs_bit = 5,
61 .sck_bit = 6,
62 .mosi_bit = 7,
63 .miso_bit = 6,
64};
65
66static const struct rayer_pinout xilinx_dlc5 = {
67 .cs_bit = 2,
68 .sck_bit = 1,
69 .mosi_bit = 0,
70 .miso_bit = 4,
71};
72
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +000073static void byteblaster_preinit(const void *);
74static int byteblaster_shutdown(void *);
75
76static const struct rayer_pinout altera_byteblastermv = {
77 .cs_bit = 1,
78 .sck_bit = 0,
79 .mosi_bit = 6,
80 .miso_bit = 7,
81 .preinit = byteblaster_preinit,
82 .shutdown = byteblaster_shutdown,
83};
84
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +000085static void stk200_preinit(const void *);
86static int stk200_shutdown(void *);
87
88static const struct rayer_pinout atmel_stk200 = {
89 .cs_bit = 7,
90 .sck_bit = 4,
91 .mosi_bit = 5,
92 .miso_bit = 6,
93 .preinit = stk200_preinit,
94 .shutdown = stk200_shutdown,
95};
96
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +000097static const struct rayer_pinout wiggler_lpt = {
98 .cs_bit = 1,
99 .sck_bit = 2,
100 .mosi_bit = 3,
101 .miso_bit = 7,
102};
103
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000104static const struct rayer_programmer rayer_spi_types[] = {
105 {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm},
106 {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5},
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000107 {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv},
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000108 {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200},
Maksim Kuleshovacba2ac2013-10-02 01:22:11 +0000109 {"wiggler", OK, "Wiggler LPT", &wiggler_lpt},
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000110 {0},
111};
112
113static const struct rayer_pinout *pinout = NULL;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000114
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000115static uint16_t lpt_iobase;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000116
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000117/* Cached value of last byte sent. */
118static uint8_t lpt_outbyte;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000119
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000120static void rayer_bitbang_set_cs(int val)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000121{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000122 lpt_outbyte &= ~(1 << pinout->cs_bit);
123 lpt_outbyte |= (val << pinout->cs_bit);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000124 OUTB(lpt_outbyte, lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000125}
126
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000127static void rayer_bitbang_set_sck(int val)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000128{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000129 lpt_outbyte &= ~(1 << pinout->sck_bit);
130 lpt_outbyte |= (val << pinout->sck_bit);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000131 OUTB(lpt_outbyte, lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000132}
133
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000134static void rayer_bitbang_set_mosi(int val)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000135{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000136 lpt_outbyte &= ~(1 << pinout->mosi_bit);
137 lpt_outbyte |= (val << pinout->mosi_bit);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000138 OUTB(lpt_outbyte, lpt_iobase);
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000139}
140
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000141static int rayer_bitbang_get_miso(void)
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000142{
143 uint8_t tmp;
144
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000145 tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted
146 tmp = (tmp >> pinout->miso_bit) & 0x1;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000147 return tmp;
148}
149
150static const struct bitbang_spi_master bitbang_spi_master_rayer = {
151 .type = BITBANG_SPI_MASTER_RAYER,
152 .set_cs = rayer_bitbang_set_cs,
153 .set_sck = rayer_bitbang_set_sck,
154 .set_mosi = rayer_bitbang_set_mosi,
155 .get_miso = rayer_bitbang_get_miso,
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000156 .half_period = 0,
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000157};
158
159int rayer_spi_init(void)
160{
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000161 const struct rayer_programmer *prog = rayer_spi_types;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000162 char *arg = NULL;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000163
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000164 /* Non-default port requested? */
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000165 arg = extract_programmer_param("iobase");
166 if (arg) {
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000167 char *endptr = NULL;
168 unsigned long tmp;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000169 tmp = strtoul(arg, &endptr, 0);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000170 /* Port 0, port >0x10000, unaligned ports and garbage strings
171 * are rejected.
172 */
173 if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) ||
174 (*endptr != '\0')) {
175 /* Using ports below 0x100 is a really bad idea, and
176 * should only be done if no port between 0x100 and
177 * 0xfffc works due to routing issues.
178 */
179 msg_perr("Error: iobase= specified, but the I/O base "
180 "given was invalid.\nIt must be a multiple of "
181 "0x4 and lie between 0x100 and 0xfffc.\n");
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000182 free(arg);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000183 return 1;
184 } else {
185 lpt_iobase = (uint16_t)tmp;
186 msg_pinfo("Non-default I/O base requested. This will "
187 "not change the hardware settings.\n");
188 }
189 } else {
190 /* Pick a default value for the I/O base. */
191 lpt_iobase = 0x378;
192 }
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000193 free(arg);
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000194
195 msg_pdbg("Using address 0x%x as I/O base for parallel port access.\n",
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000196 lpt_iobase);
197
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000198 arg = extract_programmer_param("type");
199 if (arg) {
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000200 for (; prog->type != NULL; prog++) {
201 if (strcasecmp(arg, prog->type) == 0) {
202 break;
203 }
204 }
205 if (prog->type == NULL) {
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000206 msg_perr("Error: Invalid device type specified.\n");
207 free(arg);
208 return 1;
209 }
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000210 free(arg);
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000211 }
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000212 msg_pinfo("Using %s pinout.\n", prog->description);
213 pinout = (struct rayer_pinout *)prog->dev_data;
Carl-Daniel Hailfingerae418d82011-09-12 06:17:06 +0000214
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +0000215 if (rget_io_perms())
216 return 1;
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000217
Carl-Daniel Hailfinger37c42522010-10-05 19:19:48 +0000218 /* Get the initial value before writing to any line. */
219 lpt_outbyte = INB(lpt_iobase);
220
Kyösti Mälkki8b1bdf12013-10-02 01:21:45 +0000221 if (pinout->shutdown)
222 register_shutdown(pinout->shutdown, (void*)pinout);
223 if (pinout->preinit)
224 pinout->preinit(pinout);
225
Carl-Daniel Hailfingerc40cff72011-12-20 00:19:29 +0000226 if (bitbang_spi_init(&bitbang_spi_master_rayer))
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000227 return 1;
228
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000229 return 0;
230}
231
Maksim Kuleshov3647b2d2013-10-02 01:21:57 +0000232static void byteblaster_preinit(const void *data){
233 msg_pdbg("byteblaster_preinit\n");
234 /* Assert #EN signal. */
235 OUTB(2, lpt_iobase + 2 );
236}
237
238static int byteblaster_shutdown(void *data){
239 msg_pdbg("byteblaster_shutdown\n");
240 /* De-Assert #EN signal. */
241 OUTB(0, lpt_iobase + 2 );
242 return 0;
243}
244
Maksim Kuleshov4dab5c12013-10-02 01:22:02 +0000245static void stk200_preinit(const void *data) {
246 msg_pdbg("stk200_init\n");
247 /* Assert #EN signals, set LED signal. */
248 lpt_outbyte = (1 << 6) ;
249 OUTB(lpt_outbyte, lpt_iobase);
250}
251
252static int stk200_shutdown(void *data) {
253 msg_pdbg("stk200_shutdown\n");
254 /* Assert #EN signals, clear LED signal. */
255 lpt_outbyte = (1 << 2) | (1 << 3);
256 OUTB(lpt_outbyte, lpt_iobase);
257 return 0;
258}
259
Carl-Daniel Hailfingere7fdd6e2010-07-21 10:26:01 +0000260#else
261#error PCI port I/O access is not supported on this architecture yet.
262#endif