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Ronald G. Minnich5b582f22006-02-23 17:16:44 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000019 */
20
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000021#include "flash.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000022#include "chipdrivers.h"
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000023
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000024/* FIXME: The datasheet is unclear whether we should use toggle_ready_jedec
25 * or wait_82802ab.
26 */
27
28int erase_lhf00l04_block(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen)
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000029{
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000030 chipaddr bios = flash->virtual_memory + blockaddr;
31 chipaddr wrprotect = flash->virtual_registers + blockaddr + 2;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000032 uint8_t status;
33
34 // clear status register
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000035 chip_writeb(0x50, bios);
Sean Nelsoned479d22010-03-24 23:14:32 +000036 msg_cdbg("Erase at 0x%lx\n", bios);
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000037 status = wait_82802ab(flash->virtual_memory);
Sean Nelson28accc22010-03-19 18:47:06 +000038 print_status_82802ab(status);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000039 // clear write protect
Sean Nelsoned479d22010-03-24 23:14:32 +000040 msg_cspew("write protect is at 0x%lx\n", (wrprotect));
41 msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect));
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000042 chip_writeb(0, wrprotect);
Sean Nelsoned479d22010-03-24 23:14:32 +000043 msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect));
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000044
45 // now start it
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000046 chip_writeb(0x20, bios);
47 chip_writeb(0xd0, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000048 programmer_delay(10);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000049 // now let's see what the register is
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000050 status = wait_82802ab(flash->virtual_memory);
Sean Nelson28accc22010-03-19 18:47:06 +000051 print_status_82802ab(status);
Sean Nelsoned479d22010-03-24 23:14:32 +000052 msg_cinfo("DONE BLOCK 0x%x\n", blockaddr);
Uwe Hermannffec5f32007-08-23 16:08:21 +000053
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000054 if (check_erased_range(flash, blockaddr, blocklen)) {
Sean Nelsoned479d22010-03-24 23:14:32 +000055 msg_cerr("ERASE FAILED!\n");
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000056 return -1;
57 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000058 return 0;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000059}
Uwe Hermannffec5f32007-08-23 16:08:21 +000060
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000061int write_lhf00l04(struct flashchip *flash, uint8_t *buf)
62{
63 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +000064 int total_size = flash->total_size * 1024;
65 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000066 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000067
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000068 if (erase_flash(flash)) {
Sean Nelsoned479d22010-03-24 23:14:32 +000069 msg_cerr("ERASE FAILED!\n");
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000070 return -1;
71 }
Sean Nelsoned479d22010-03-24 23:14:32 +000072 msg_cinfo("Programming page: ");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000073 for (i = 0; i < total_size / page_size; i++) {
Sean Nelsoned479d22010-03-24 23:14:32 +000074 msg_cinfo("%04d at address: 0x%08x", i, i * page_size);
Sean Nelsone4446e42010-03-16 00:51:31 +000075 write_page_82802ab(bios, buf + i * page_size,
Uwe Hermanna7e05482007-05-09 10:17:44 +000076 bios + i * page_size, page_size);
Sean Nelsoned479d22010-03-24 23:14:32 +000077 msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000078 }
Sean Nelsoned479d22010-03-24 23:14:32 +000079 msg_cinfo("\n");
Uwe Hermannffec5f32007-08-23 16:08:21 +000080
81 return 0;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000082}