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Yinghai Luca782972007-01-22 20:21:17 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Yinghai Luca782972007-01-22 20:21:17 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2005-2007 coresystems GmbH
Yinghai Luca782972007-01-22 20:21:17 +00006 *
Uwe Hermannd1107642007-08-29 17:52:32 +00007 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
Yinghai Luca782972007-01-22 20:21:17 +000011 *
Uwe Hermannd1107642007-08-29 17:52:32 +000012 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Yinghai Luca782972007-01-22 20:21:17 +000016 *
Uwe Hermannd1107642007-08-29 17:52:32 +000017 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Yinghai Luca782972007-01-22 20:21:17 +000020 */
21
22#include <errno.h>
23#include <fcntl.h>
24#include <sys/mman.h>
Yinghai Luca782972007-01-22 20:21:17 +000025#include <stdlib.h>
Yinghai Luca782972007-01-22 20:21:17 +000026#include "flash.h"
Yinghai Luca782972007-01-22 20:21:17 +000027
28#define SECTOR_ERASE 0x30
29#define BLOCK_ERASE 0x20
30#define ERASE 0xD0
31#define AUTO_PGRM 0x10
32#define RESET 0xFF
33#define READ_ID 0x90
34#define READ_STATUS 0x70
35#define CLEAR_STATUS 0x50
36
37#define STATUS_BPS (1 << 1)
38#define STATUS_ESS (1 << 6)
39#define STATUS_WSMS (1 << 7)
40
Uwe Hermann33269a72009-06-05 00:42:18 +000041static int write_lockbits_49lfxxxc(chipaddr bios, int size, unsigned char bits)
Yinghai Luca782972007-01-22 20:21:17 +000042{
43 int i, left = size;
44 unsigned long address;
45
Uwe Hermann33269a72009-06-05 00:42:18 +000046 printf_debug("\nbios=0x%08lx\n", bios);
Yinghai Luca782972007-01-22 20:21:17 +000047 for (i = 0; left > 65536; i++, left -= 65536) {
Uwe Hermann33269a72009-06-05 00:42:18 +000048 printf_debug("lockbits at address=%p is 0x%01x\n",
49 (void *)(0xffc00000 - size + (i * 65536) + 2),
50 chip_readb(bios + (i * 65536) + 2));
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000051 chip_writeb(bits, bios + (i * 65536) + 2);
Yinghai Luca782972007-01-22 20:21:17 +000052 }
53 address = i * 65536;
Uwe Hermann33269a72009-06-05 00:42:18 +000054 printf_debug("lockbits at address=%p is 0x%01x\n",
55 (void *)(0xffc00000 - size + address + 2),
56 chip_readb(bios + address + 2));
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000057 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000058 address += 32768;
Uwe Hermann33269a72009-06-05 00:42:18 +000059 printf_debug("lockbits at address=%p is 0x%01x\n",
60 (void *)(0xffc00000 - size + address + 2),
61 chip_readb(bios + address + 2));
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000062 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000063 address += 8192;
Uwe Hermann33269a72009-06-05 00:42:18 +000064 printf_debug("lockbits at address=%p is 0x%01x\n",
65 (void *)(0xffc00000 - size + address + 2),
66 chip_readb(bios + address + 2));
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000067 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000068 address += 8192;
Uwe Hermann33269a72009-06-05 00:42:18 +000069 printf_debug("lockbits at address=%p is 0x%01x\n",
70 (void *)(0xffc00000 - size + address + 2),
71 chip_readb(bios + address + 2));
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000072 chip_writeb(bits, bios + address + 2);
Yinghai Luca782972007-01-22 20:21:17 +000073
Uwe Hermannffec5f32007-08-23 16:08:21 +000074 return 0;
Yinghai Luca782972007-01-22 20:21:17 +000075}
76
Uwe Hermann09e04f72009-05-16 22:36:00 +000077static int erase_sector_49lfxxxc(chipaddr bios, unsigned long address)
Yinghai Luca782972007-01-22 20:21:17 +000078{
79 unsigned char status;
80
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000081 chip_writeb(SECTOR_ERASE, bios);
82 chip_writeb(ERASE, bios + address);
Yinghai Luca782972007-01-22 20:21:17 +000083
84 do {
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000085 status = chip_readb(bios);
Yinghai Luca782972007-01-22 20:21:17 +000086 if (status & (STATUS_ESS | STATUS_BPS)) {
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000087 printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", bios + address, status);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000088 chip_writeb(CLEAR_STATUS, bios);
Uwe Hermanna7e05482007-05-09 10:17:44 +000089 return (-1);
Yinghai Luca782972007-01-22 20:21:17 +000090 }
Uwe Hermanna7e05482007-05-09 10:17:44 +000091 } while (!(status & STATUS_WSMS));
Yinghai Luca782972007-01-22 20:21:17 +000092
Uwe Hermannffec5f32007-08-23 16:08:21 +000093 return 0;
Yinghai Luca782972007-01-22 20:21:17 +000094}
95
Uwe Hermann09e04f72009-05-16 22:36:00 +000096static int write_sector_49lfxxxc(chipaddr bios, uint8_t *src, chipaddr dst,
97 unsigned int page_size)
Yinghai Luca782972007-01-22 20:21:17 +000098{
99 int i;
100 unsigned char status;
101
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000102 chip_writeb(CLEAR_STATUS, bios);
Yinghai Luca782972007-01-22 20:21:17 +0000103 for (i = 0; i < page_size; i++) {
104 /* transfer data from source to destination */
105 if (*src == 0xFF) {
106 dst++, src++;
107 /* If the data is 0xFF, don't program it */
108 continue;
109 }
110 /*issue AUTO PROGRAM command */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000111 chip_writeb(AUTO_PGRM, bios);
112 chip_writeb(*src++, dst++);
Yinghai Luca782972007-01-22 20:21:17 +0000113
114 do {
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000115 status = chip_readb(bios);
Yinghai Luca782972007-01-22 20:21:17 +0000116 if (status & (STATUS_ESS | STATUS_BPS)) {
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000117 printf("sector write FAILED at address=0x%08lx status=0x%01x\n", dst, status);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000118 chip_writeb(CLEAR_STATUS, bios);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000119 return (-1);
Yinghai Luca782972007-01-22 20:21:17 +0000120 }
121 } while (!(status & STATUS_WSMS));
122 }
123
Uwe Hermannffec5f32007-08-23 16:08:21 +0000124 return 0;
Yinghai Luca782972007-01-22 20:21:17 +0000125}
126
127int probe_49lfxxxc(struct flashchip *flash)
128{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000129 chipaddr bios = flash->virtual_memory;
Yinghai Luca782972007-01-22 20:21:17 +0000130 uint8_t id1, id2;
Yinghai Luca782972007-01-22 20:21:17 +0000131
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000132 chip_writeb(RESET, bios);
Yinghai Luca782972007-01-22 20:21:17 +0000133
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000134 chip_writeb(READ_ID, bios);
135 id1 = chip_readb(bios);
136 id2 = chip_readb(bios + 0x01);
Yinghai Luca782972007-01-22 20:21:17 +0000137
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000138 chip_writeb(RESET, bios);
Yinghai Luca782972007-01-22 20:21:17 +0000139
Peter Stuge5cafc332009-01-25 23:52:45 +0000140 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000141
Yinghai Luca782972007-01-22 20:21:17 +0000142 if (!(id1 == flash->manufacture_id && id2 == flash->model_id))
143 return 0;
144
Stefan Reinauerff4f1972007-05-24 08:48:10 +0000145 map_flash_registers(flash);
146
Yinghai Luca782972007-01-22 20:21:17 +0000147 return 1;
148}
149
150int erase_49lfxxxc(struct flashchip *flash)
151{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000152 chipaddr bios = flash->virtual_memory;
153 chipaddr registers = flash->virtual_registers;
Yinghai Luca782972007-01-22 20:21:17 +0000154 int i;
155 unsigned int total_size = flash->total_size * 1024;
156
Stefan Reinauerce532972007-05-23 17:20:56 +0000157 write_lockbits_49lfxxxc(registers, total_size, 0);
Yinghai Luca782972007-01-22 20:21:17 +0000158 for (i = 0; i < total_size; i += flash->page_size)
Uwe Hermanna7e05482007-05-09 10:17:44 +0000159 if (erase_sector_49lfxxxc(bios, i) != 0)
160 return (-1);
Yinghai Luca782972007-01-22 20:21:17 +0000161
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000162 chip_writeb(RESET, bios);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000163
164 return 0;
Yinghai Luca782972007-01-22 20:21:17 +0000165}
166
167int write_49lfxxxc(struct flashchip *flash, uint8_t *buf)
168{
169 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000170 int total_size = flash->total_size * 1024;
171 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000172 chipaddr bios = flash->virtual_memory;
Yinghai Luca782972007-01-22 20:21:17 +0000173
Stefan Reinauerce532972007-05-23 17:20:56 +0000174 write_lockbits_49lfxxxc(flash->virtual_registers, total_size, 0);
Uwe Hermanna502dce2007-10-17 23:55:15 +0000175 printf("Programming page: ");
Yinghai Luca782972007-01-22 20:21:17 +0000176 for (i = 0; i < total_size / page_size; i++) {
177 /* erase the page before programming */
178 erase_sector_49lfxxxc(bios, i * page_size);
179
180 /* write to the sector */
181 printf("%04d at address: 0x%08x", i, i * page_size);
182 write_sector_49lfxxxc(bios, buf + i * page_size,
Uwe Hermanna7e05482007-05-09 10:17:44 +0000183 bios + i * page_size, page_size);
Yinghai Luca782972007-01-22 20:21:17 +0000184 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
185 }
186 printf("\n");
187
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000188 chip_writeb(RESET, bios);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000189
190 return 0;
Yinghai Luca782972007-01-22 20:21:17 +0000191}