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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000019 */
20
21#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000022
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000023static __inline__ int erase_sector_29f040b(chipaddr bios,
Ollie Lho761bf1b2004-03-20 16:46:10 +000024 unsigned long address)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000025{
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000026 chip_writeb(0xAA, bios + 0x555);
27 chip_writeb(0x55, bios + 0x2AA);
28 chip_writeb(0x80, bios + 0x555);
29 chip_writeb(0xAA, bios + 0x555);
30 chip_writeb(0x55, bios + 0x2AA);
31 chip_writeb(0x30, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000032
33 sleep(2);
34
35 /* wait for Toggle bit ready */
36 toggle_ready_jedec(bios + address);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000037
Uwe Hermannffec5f32007-08-23 16:08:21 +000038 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000039}
40
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000041static __inline__ int write_sector_29f040b(chipaddr bios,
Ollie Lho184a4042005-11-26 21:55:36 +000042 uint8_t *src,
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000043 chipaddr dst,
Ollie Lho761bf1b2004-03-20 16:46:10 +000044 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000045{
46 int i;
47
48 for (i = 0; i < page_size; i++) {
Uwe Hermann0b7afe62007-04-01 19:44:21 +000049 if ((i & 0xfff) == 0xfff)
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000050 printf("0x%08lx", dst - bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +000051
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000052 chip_writeb(0xAA, bios + 0x555);
53 chip_writeb(0x55, bios + 0x2AA);
54 chip_writeb(0xA0, bios + 0x555);
55 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000056
57 /* wait for Toggle bit ready */
58 toggle_ready_jedec(bios);
59
Uwe Hermann0b7afe62007-04-01 19:44:21 +000060 if ((i & 0xfff) == 0xfff)
Stefan Reinauer99349a52006-03-16 16:46:19 +000061 printf("\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000062 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000063
Uwe Hermannffec5f32007-08-23 16:08:21 +000064 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000065}
66
Ollie Lho761bf1b2004-03-20 16:46:10 +000067int probe_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000068{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000069 chipaddr bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000070 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000071
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000072 chip_writeb(0xAA, bios + 0x555);
73 chip_writeb(0x55, bios + 0x2AA);
74 chip_writeb(0x90, bios + 0x555);
Ollie Lho761bf1b2004-03-20 16:46:10 +000075
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000076 id1 = chip_readb(bios);
77 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000078
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000079 chip_writeb(0xF0, bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000080
Ronald G. Minnichef5779d2002-01-29 20:18:02 +000081 myusec_delay(10);
Ollie Lho761bf1b2004-03-20 16:46:10 +000082
Peter Stuge5cafc332009-01-25 23:52:45 +000083 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000084 if (id1 == flash->manufacture_id && id2 == flash->model_id)
85 return 1;
86
87 return 0;
88}
89
Ollie Lho761bf1b2004-03-20 16:46:10 +000090int erase_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000091{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000092 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000093
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000094 chip_writeb(0xAA, bios + 0x555);
95 chip_writeb(0x55, bios + 0x2AA);
96 chip_writeb(0x80, bios + 0x555);
97 chip_writeb(0xAA, bios + 0x555);
98 chip_writeb(0x55, bios + 0x2AA);
99 chip_writeb(0x10, bios + 0x555);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000100
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000101 myusec_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000102 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000103
Uwe Hermannffec5f32007-08-23 16:08:21 +0000104 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000105}
106
Ollie Lho184a4042005-11-26 21:55:36 +0000107int write_29f040b(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000108{
109 int i;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000110 int total_size = flash->total_size * 1024;
111 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000112 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000113
Stefan Reinauer99349a52006-03-16 16:46:19 +0000114 printf("Programming page ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000115 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000116 /* erase the page before programming */
117 erase_sector_29f040b(bios, i * page_size);
118
119 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000120 printf("%04d at address: ", i);
121 write_sector_29f040b(bios, buf + i * page_size,
122 bios + i * page_size, page_size);
123 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000124 }
125 printf("\n");
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000126
Uwe Hermannffec5f32007-08-23 16:08:21 +0000127 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000128}