ichspi: Add Intel Lunar Lake support
Hardware looks much the same as Meteor Lake. The descriptor, however,
knows 7 masters and regions are named a bit differently. Hence, add a
new enum entry for Lunar Lake.
Tested `ich_descriptors_tool' output for an MSI Prestige 13 A2VMG BIOS.
Documents used:
* Intel® Core™ Ultra 200V Series Processors Datasheet, Volumes 1 and 2
* Lunar Lake Client Platform
SPI Programming Guide
Change-Id: Ia377872cba56a3db6d853b7ce1bd495e5a03a868
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/271
diff --git a/chipset_enable.c b/chipset_enable.c
index 29032fb..bb6b034 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -707,6 +707,7 @@
case CHIPSET_ELKHART_LAKE:
case CHIPSET_SNOW_RIDGE: /* hard coded to 0 (SPI) */
case CHIPSET_METEOR_LAKE:
+ case CHIPSET_LUNAR_LAKE:
boot_straps = boot_straps_apl;
break;
case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet
@@ -1032,6 +1033,12 @@
return enable_flash_pch_spidev(spi_dev, name, CHIPSET_METEOR_LAKE);
}
+static int enable_flash_lnl(struct flashprog_programmer *const prog,
+ struct pci_dev *const spi_dev, const char *const name)
+{
+ return enable_flash_pch_spidev(spi_dev, name, CHIPSET_LUNAR_LAKE);
+}
+
/* Silvermont architecture: Bay Trail(-T/-I), Avoton/Rangeley.
* These have a distinctly different behavior compared to other Intel chipsets and hence are handled separately.
*
@@ -2234,6 +2241,7 @@
{0x8086, 0x7aa4, ANY_REV, B_S, NT, "Intel", "Alder Lake-S", enable_flash_pch500},
{0x8086, 0x18e0, ANY_REV, B_S, NT, "Intel", "Snow Ridge", enable_flash_snowridge},
{0x8086, 0x7e23, ANY_REV, B_S, DEP, "Intel", "Meteor Lake", enable_flash_mtl},
+ {0x8086, 0xa823, ANY_REV, B_S, NT, "Intel", "Lunar Lake", enable_flash_lnl},
#endif
{0},
};