flashchips: Add XMC XM25QH512C/RH512C/QU512C

These chips are virtually the same except for their voltage ranges
and that the RH variant has additional RPMC features.

Datasheets used:
https://www.xmcwh.com/uploads/803/XM25QH512C_Ver1.5.pdf
https://www.xmcwh.com/uploads/690/XM25RH512C_Ver1.0.pdf
https://www.xmcwh.com/uploads/808/XM25QU512C_V1.6.pdf

Change-Id: Id3270be6a9486911894226a8e4814a09b3ec7150
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/575
diff --git a/flashchips.c b/flashchips.c
index 711aefa..6dc4193 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -25829,6 +25829,68 @@
 
 	{
 		.vendor		= "XMC",
+		.name		= "XM25QH512C",
+		.bustype	= BUS_SPI,
+		.id.type	= ID_SPI_RDID,
+		.id.manufacture	= ST_ID,
+		.id.model	= XMC_XM25QH512C,
+		.total_size	= 65536,
+		.page_size	= 256,
+		/* supports SFDP */
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3 |
+				  FEATURE_OTP | FEATURE_4BA | FEATURE_QPI_SRP,
+		.dummy_cycles	= { .qpi_read_params = { 2, 4, 6, 8 } },
+		.tested		= TEST_UNTESTED,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 16384} },
+				.block_erase = spi_block_erase_21,
+			}, {
+				.eraseblocks = { {4 * 1024, 16384} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 2048} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 1024} },
+				.block_erase = spi_block_erase_dc,
+			}, {
+				.eraseblocks = { {64 * 1024, 1024} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {64 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {64 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp3_srwd,
+		.unlock		= spi_disable_blockprotect_bp3_srwd,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {2700, 3600},
+		.reg_bits	=
+		{
+			.qe	= {STATUS2, 1, RW},
+			.dc	= {{STATUS3, 3, RW}, {STATUS3, 4, RW}}, /* for SPI mode only */
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+			.tb     = {STATUS1, 6, RW},
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.wp_write_cfg	= spi_wp_write_cfg,
+		.wp_read_cfg	= spi_wp_read_cfg,
+		.wp_get_ranges	= spi_wp_get_available_ranges,
+		.decode_range	= decode_range_spi25,
+		.prepare_access	= spi_prepare_io,
+		.finish_access	= spi_finish_io,
+	},
+
+	{
+		.vendor		= "XMC",
 		.name		= "XM25QH64C",
 		.bustype	= BUS_SPI,
 		.id.type	= ID_SPI_RDID,
@@ -25983,6 +26045,68 @@
 
 	{
 		.vendor		= "XMC",
+		.name		= "XM25QU512C",
+		.bustype	= BUS_SPI,
+		.id.type	= ID_SPI_RDID,
+		.id.manufacture	= ST_ID,
+		.id.model	= XMC_XM25QU512C,
+		.total_size	= 65536,
+		.page_size	= 256,
+		/* supports SFDP */
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3 |
+				  FEATURE_OTP | FEATURE_4BA | FEATURE_QPI_SRP,
+		.dummy_cycles	= { .qpi_read_params = { 2, 4, 6, 8 } },
+		.tested		= TEST_UNTESTED,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 16384} },
+				.block_erase = spi_block_erase_21,
+			}, {
+				.eraseblocks = { {4 * 1024, 16384} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 2048} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 1024} },
+				.block_erase = spi_block_erase_dc,
+			}, {
+				.eraseblocks = { {64 * 1024, 1024} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {64 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {64 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp3_srwd,
+		.unlock		= spi_disable_blockprotect_bp3_srwd,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1650, 1950},
+		.reg_bits	=
+		{
+			.qe	= {STATUS2, 1, RW},
+			.dc	= {{STATUS3, 3, RW}, {STATUS3, 4, RW}}, /* for SPI mode only */
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+			.tb     = {STATUS1, 6, RW},
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.wp_write_cfg	= spi_wp_write_cfg,
+		.wp_read_cfg	= spi_wp_read_cfg,
+		.wp_get_ranges	= spi_wp_get_available_ranges,
+		.decode_range	= decode_range_spi25,
+		.prepare_access	= spi_prepare_io,
+		.finish_access	= spi_finish_io,
+	},
+
+	{
+		.vendor		= "XMC",
 		.name		= "XM25QU64C",
 		.bustype	= BUS_SPI,
 		.id.type	= ID_SPI_RDID,
@@ -26027,6 +26151,68 @@
 	},
 
 	{
+		.vendor		= "XMC",
+		.name		= "XM25RH512C",
+		.bustype	= BUS_SPI,
+		.id.type	= ID_SPI_RDID,
+		.id.manufacture	= ST_ID,
+		.id.model	= XMC_XM25RH512C,
+		.total_size	= 65536,
+		.page_size	= 256,
+		/* supports SFDP */
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3 |
+				  FEATURE_OTP | FEATURE_4BA | FEATURE_QPI_SRP,
+		.dummy_cycles	= { .qpi_read_params = { 2, 4, 6, 8 } },
+		.tested		= TEST_UNTESTED,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 16384} },
+				.block_erase = spi_block_erase_21,
+			}, {
+				.eraseblocks = { {4 * 1024, 16384} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 2048} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 1024} },
+				.block_erase = spi_block_erase_dc,
+			}, {
+				.eraseblocks = { {64 * 1024, 1024} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {64 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {64 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp3_srwd,
+		.unlock		= spi_disable_blockprotect_bp3_srwd,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {2700, 3600},
+		.reg_bits	=
+		{
+			.qe	= {STATUS2, 1, RW},
+			.dc	= {{STATUS3, 3, RW}, {STATUS3, 4, RW}}, /* for SPI mode only */
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+			.tb     = {STATUS1, 6, RW},
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.wp_write_cfg	= spi_wp_write_cfg,
+		.wp_read_cfg	= spi_wp_read_cfg,
+		.wp_get_ranges	= spi_wp_get_available_ranges,
+		.decode_range	= decode_range_spi25,
+		.prepare_access	= spi_prepare_io,
+		.finish_access	= spi_finish_io,
+	},
+
+	{
 		.vendor		= "XTX Technology",
 		.name		= "XT25F02E",
 		.bustype	= BUS_SPI,
diff --git a/include/flashchips.h b/include/flashchips.h
index 557043e..b73de30 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -870,11 +870,14 @@
 #define ST_M45PE80		0x4014
 #define ST_M45PE16		0x4015
 #define XMC_XM25QH64C		0x4017
-#define XMC_XM25QU64C		0x4117
 #define XMC_XM25QH128C		0x4018
-#define XMC_XM25QU128C		0x4118
 #define XMC_XM25QH256C		0x4019
+#define XMC_XM25QH512C		0x4020
+#define XMC_XM25QU64C		0x4117
+#define XMC_XM25QU128C		0x4118
 #define XMC_XM25QU256C		0x4119
+#define XMC_XM25QU512C		0x4120
+#define XMC_XM25RH512C		0x4320
 #define ST_M25PX80		0x7114
 #define ST_M25PX16		0x7115
 #define ST_M25PX32		0x7116