flashchips: Add GigaDevice GD25LQ20, update family up to GD25LQ16
They all are supposed to support volatile status-register writes and
feature the most usual block-protection bits. The 1.695V limit looks
certainly like a typo. All datasheets found start at 1.65V.
Datasheets used:
https://device.report/m/0dd9581d418568153f88153cd3bd298f85f83fba817fc6b242405e98002f7c44.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00347-GD25LQ20C-Rev1.5.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20221129/DS-00785-GD25LQ20E-Rev1.2.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20221129/DS-00663-GD25LQ40E-Rev1.2.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00405-GD25LQ80C-Rev1.9.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00583-GD25LQ80E-Rev1.3.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00289-GD25LQ16C-Rev2.1.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240902/DS-00576-GD25LQ16E-Rev1.4.pdf
Change-Id: I23b3b199d9c6fd7b42de468cbe8b3945774f15e8
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/301
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/flashchips.c b/flashchips.c
index a7c3c67..d7814a5 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7318,9 +7318,9 @@
.model_id = GIGADEVICE_GD25LQ16,
.total_size = 2048,
.page_size = 256,
- /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
- /* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ16C */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+ /* OTP: 1024B total, 256B reserved, later 3x 512B; read 0x48; write 0x42, erase 0x44 */
+ /* FEATURE_QPI_SRP(4, 4, 6, 8) except for L.16C */
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
@@ -7343,15 +7343,80 @@
.block_erase = spi_block_erase_c7,
}
},
+ .printlock = spi_prettyprint_status_register_bp4_srwd,
+ .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1650, 1950}, /* 16C, 16E: up to 2.1V */
.reg_bits =
{
.qe = {STATUS2, 1, RW},
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+ .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+ .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+ .cmp = {STATUS2, 6, RW},
+ },
+ .wp_write_cfg = spi_wp_write_cfg,
+ .wp_read_cfg = spi_wp_read_cfg,
+ .wp_get_ranges = spi_wp_get_available_ranges,
+ .decode_range = decode_range_spi25,
+ .prepare_access = spi_prepare_io,
+ .finish_access = spi_finish_io,
+ },
+
+ {
+ .vendor = "GigaDevice",
+ .name = "GD25LQ20",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25LQ20,
+ .total_size = 256,
+ .page_size = 256,
+ /* OTP: 3x 512B; read 0x48; write 0x42, erase 0x44 */
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 64} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 8} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 4} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
},
.printlock = spi_prettyprint_status_register_bp4_srwd,
.unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
.write = spi_chip_write_256,
.read = spi_chip_read,
- .voltage = {1695, 1950},
+ .voltage = {1650, 1950}, /* 20C: up to 2.1V, 20E: up to 2.0V */
+ .reg_bits =
+ {
+ .qe = {STATUS2, 1, RW},
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+ .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+ .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+ .cmp = {STATUS2, 6, RW},
+ },
+ .wp_write_cfg = spi_wp_write_cfg,
+ .wp_read_cfg = spi_wp_read_cfg,
+ .wp_get_ranges = spi_wp_get_available_ranges,
+ .decode_range = decode_range_spi25,
.prepare_access = spi_prepare_io,
.finish_access = spi_finish_io,
},
@@ -7410,9 +7475,9 @@
.model_id = GIGADEVICE_GD25LQ40,
.total_size = 512,
.page_size = 256,
- /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
- /* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ40B, LQ40C */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+ /* OTP: 1024B total, 256B reserved, later 3x 512B; read 0x48; write 0x42, erase 0x44 */
+ /* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ40B, LQ40C, LQ40E */
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
@@ -7435,15 +7500,25 @@
.block_erase = spi_block_erase_c7,
}
},
- .reg_bits =
- {
- .qe = {STATUS2, 1, RW},
- },
.printlock = spi_prettyprint_status_register_bp4_srwd,
.unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
.write = spi_chip_write_256,
.read = spi_chip_read,
- .voltage = {1695, 1950},
+ .voltage = {1650, 1950}, /* 40C: up to 2.1V, 40E: up to 2.0V */
+ .reg_bits =
+ {
+ .qe = {STATUS2, 1, RW},
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+ .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+ .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+ .cmp = {STATUS2, 6, RW},
+ },
+ .wp_write_cfg = spi_wp_write_cfg,
+ .wp_read_cfg = spi_wp_read_cfg,
+ .wp_get_ranges = spi_wp_get_available_ranges,
+ .decode_range = decode_range_spi25,
.prepare_access = spi_prepare_io,
.finish_access = spi_finish_io,
},
@@ -7512,9 +7587,9 @@
.model_id = GIGADEVICE_GD25LQ80,
.total_size = 1024,
.page_size = 256,
- /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+ /* OTP: 1024B total, 256B reserved, later 3x 512B; read 0x48; write 0x42, erase 0x44 */
/* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ80B, LQ80C */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
@@ -7537,15 +7612,25 @@
.block_erase = spi_block_erase_c7,
}
},
- .reg_bits =
- {
- .qe = {STATUS2, 1, RW},
- },
.printlock = spi_prettyprint_status_register_bp4_srwd,
.unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
.write = spi_chip_write_256,
.read = spi_chip_read,
- .voltage = {1695, 1950},
+ .voltage = {1650, 1950}, /* 80C: up to 2.1V, 80E: up to 2.0V */
+ .reg_bits =
+ {
+ .qe = {STATUS2, 1, RW},
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+ .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+ .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+ .cmp = {STATUS2, 6, RW},
+ },
+ .wp_write_cfg = spi_wp_write_cfg,
+ .wp_read_cfg = spi_wp_read_cfg,
+ .wp_get_ranges = spi_wp_get_available_ranges,
+ .decode_range = decode_range_spi25,
.prepare_access = spi_prepare_io,
.finish_access = spi_finish_io,
},
diff --git a/include/flashchips.h b/include/flashchips.h
index 301f579..e901069 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -408,6 +408,7 @@
#define GIGADEVICE_GD25B512ME 0x471a /* Same as GD25R512ME */
#define GIGADEVICE_GD55B01GE 0x471b
#define GIGADEVICE_GD55B02GE 0x471c
+#define GIGADEVICE_GD25LQ20 0x6012
#define GIGADEVICE_GD25LQ40 0x6013
#define GIGADEVICE_GD25LQ80 0x6014
#define GIGADEVICE_GD25LQ16 0x6015