diff --git a/flashchips.c b/flashchips.c
index a7c3c67..d7814a5 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7318,9 +7318,9 @@
 		.model_id	= GIGADEVICE_GD25LQ16,
 		.total_size	= 2048,
 		.page_size	= 256,
-		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
-		/* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ16C */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+		/* OTP: 1024B total, 256B reserved, later 3x 512B; read 0x48; write 0x42, erase 0x44 */
+		/* FEATURE_QPI_SRP(4, 4, 6, 8) except for L.16C */
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -7343,15 +7343,80 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_bp4_srwd,
+		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1650, 1950}, /* 16C, 16E: up to 2.1V */
 		.reg_bits	=
 		{
 			.qe	= {STATUS2, 1, RW},
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+			.tb     = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+			.sec    = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.wp_write_cfg	= spi_wp_write_cfg,
+		.wp_read_cfg	= spi_wp_read_cfg,
+		.wp_get_ranges	= spi_wp_get_available_ranges,
+		.decode_range	= decode_range_spi25,
+		.prepare_access	= spi_prepare_io,
+		.finish_access	= spi_finish_io,
+	},
+
+	{
+		.vendor		= "GigaDevice",
+		.name		= "GD25LQ20",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LQ20,
+		.total_size	= 256,
+		.page_size	= 256,
+		/* OTP: 3x 512B; read 0x48; write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 64} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 8} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 4} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {256 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {256 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
 		},
 		.printlock	= spi_prettyprint_status_register_bp4_srwd,
 		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
-		.voltage	= {1695, 1950},
+		.voltage	= {1650, 1950}, /* 20C: up to 2.1V, 20E: up to 2.0V */
+		.reg_bits	=
+		{
+			.qe	= {STATUS2, 1, RW},
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+			.tb     = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+			.sec    = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.wp_write_cfg	= spi_wp_write_cfg,
+		.wp_read_cfg	= spi_wp_read_cfg,
+		.wp_get_ranges	= spi_wp_get_available_ranges,
+		.decode_range	= decode_range_spi25,
 		.prepare_access	= spi_prepare_io,
 		.finish_access	= spi_finish_io,
 	},
@@ -7410,9 +7475,9 @@
 		.model_id	= GIGADEVICE_GD25LQ40,
 		.total_size	= 512,
 		.page_size	= 256,
-		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
-		/* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ40B, LQ40C */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+		/* OTP: 1024B total, 256B reserved, later 3x 512B; read 0x48; write 0x42, erase 0x44 */
+		/* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ40B, LQ40C, LQ40E */
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -7435,15 +7500,25 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
-		.reg_bits	=
-		{
-			.qe	= {STATUS2, 1, RW},
-		},
 		.printlock	= spi_prettyprint_status_register_bp4_srwd,
 		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
-		.voltage	= {1695, 1950},
+		.voltage	= {1650, 1950}, /* 40C: up to 2.1V, 40E: up to 2.0V */
+		.reg_bits	=
+		{
+			.qe	= {STATUS2, 1, RW},
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+			.tb     = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+			.sec    = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.wp_write_cfg	= spi_wp_write_cfg,
+		.wp_read_cfg	= spi_wp_read_cfg,
+		.wp_get_ranges	= spi_wp_get_available_ranges,
+		.decode_range	= decode_range_spi25,
 		.prepare_access	= spi_prepare_io,
 		.finish_access	= spi_finish_io,
 	},
@@ -7512,9 +7587,9 @@
 		.model_id	= GIGADEVICE_GD25LQ80,
 		.total_size	= 1024,
 		.page_size	= 256,
-		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+		/* OTP: 1024B total, 256B reserved, later 3x 512B; read 0x48; write 0x42, erase 0x44 */
 		/* FEATURE_QPI_SRP(4, 4, 6, 8) except for LQ80B, LQ80C */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_WRSR_EXT2 | FEATURE_OTP | FEATURE_QIO,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -7537,15 +7612,25 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
-		.reg_bits	=
-		{
-			.qe	= {STATUS2, 1, RW},
-		},
 		.printlock	= spi_prettyprint_status_register_bp4_srwd,
 		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
-		.voltage	= {1695, 1950},
+		.voltage	= {1650, 1950}, /* 80C: up to 2.1V, 80E: up to 2.0V */
+		.reg_bits	=
+		{
+			.qe	= {STATUS2, 1, RW},
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+			.tb     = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+			.sec    = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+			.cmp    = {STATUS2, 6, RW},
+		},
+		.wp_write_cfg	= spi_wp_write_cfg,
+		.wp_read_cfg	= spi_wp_read_cfg,
+		.wp_get_ranges	= spi_wp_get_available_ranges,
+		.decode_range	= decode_range_spi25,
 		.prepare_access	= spi_prepare_io,
 		.finish_access	= spi_finish_io,
 	},
diff --git a/include/flashchips.h b/include/flashchips.h
index 301f579..e901069 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -408,6 +408,7 @@
 #define GIGADEVICE_GD25B512ME	0x471a	/* Same as GD25R512ME */
 #define GIGADEVICE_GD55B01GE	0x471b
 #define GIGADEVICE_GD55B02GE	0x471c
+#define GIGADEVICE_GD25LQ20	0x6012
 #define GIGADEVICE_GD25LQ40	0x6013
 #define GIGADEVICE_GD25LQ80	0x6014
 #define GIGADEVICE_GD25LQ16	0x6015