)]}'
{
  "log": [
    {
      "commit": "dfcdd77f8e9b7c499a7a89de7d0d4dc29a3fc91f",
      "tree": "39f91b5bd83d011d369ef305d9348452a7bd5869",
      "parents": [
        "d1988d1a033d4d12b48cbc6640984ef3b143fd30"
      ],
      "author": {
        "name": "Arthur Heymans",
        "email": "arthur@aheymans.xyz",
        "time": "Wed Mar 28 16:42:50 2018 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Apr 03 12:59:46 2018 +0000"
      },
      "message": "gma: Add flag to allow use of VGACNTRL on GMCH\n\nChange-Id: If2f12f14b4f367cdfc8cc2c20402f2350e3bbba8\nSigned-off-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nReviewed-on: https://review.coreboot.org/25404\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "b03c8f19ae0d7e1f9f27ff258e72a37dfb87f323",
      "tree": "4406950a9497d0683687521c760430a02d907663",
      "parents": [
        "51375ad75a99d395f3843e46783c0743b5fea29b"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Aug 25 13:29:08 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Dec 12 14:25:56 2017 +0000"
      },
      "message": "gma registers: Add procedures to set fence registers\n\nThrough fence registers, we can tell the hardware which parts of the\naperture cover tiled framebuffers. Only legacy X and Y tiling is sup-\nported. According to `i915_reg.h` there are 16 fence registers from\nG4x on and 32 from Ivy Bridge on (this only partially matches docu-\nmentation: Haswell has 16 regs documented and the fence registers\nwere not documented at all before).\n\nChange-Id: I02edc99b315e24dc175c6f93aff627e59cb1ff0b\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/22708\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "17d64b6d0195109623b136493a9c7380008743d3",
      "tree": "c6b0267cc9d3c2ba26d3136baec8dbd54678488a",
      "parents": [
        "2b6f6992188460bbb10ce2838a981ddc37141755"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jul 15 20:51:25 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Aug 21 10:56:43 2017 +0000"
      },
      "message": "gma: Clear \"fence\" registers during initialization\n\nThese registers are used to mark certain GTT regions as tiled.\n\nChange-Id: Ic2cd61c0c1b42990ed955d7f77a428a2b9dbabd5\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/20601\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "2b6f6992188460bbb10ce2838a981ddc37141755",
      "tree": "e744d7d06e1414a4d089fd6f7c2849ea15286045",
      "parents": [
        "b8ae61876b8ddbf788f2168c87c8fce8dbaad0e3"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jul 09 18:11:34 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Aug 21 10:56:15 2017 +0000"
      },
      "message": "gma: Add a HW.PCI.Dev for dynamic MMIO setup\n\nRemove `MMIO_Base` option from Initialize() and try to derive it\nusing libhwbase\u0027 PCI mechanism instead.\n\nChange-Id: Iacd4d098954bb96c1c6b40fdfb2636191d9517c7\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/20600\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "b8ae61876b8ddbf788f2168c87c8fce8dbaad0e3",
      "tree": "44a2d4bce1cb8d7bd1fafdf90e048d47eac6e8a6",
      "parents": [
        "fda2d6eaef548a193cc70fc2c2dd0dbeb649951e"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jul 15 20:03:56 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Aug 21 10:54:09 2017 +0000"
      },
      "message": "gma: Move GTT constants into GMA.Config\n\nChange-Id: Ie4b017f26b658c1818f90701089ce5d3171e4953\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/20599\nReviewed-by: Paul Menzel \u003cpaulepanter@users.sourceforge.net\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "58afc202b1b29898f68f239ec7e50ac532b5d46c",
      "tree": "bce198ed9feb3b08fdb1412531e0867c139976ad",
      "parents": [
        "18ff0c13b740f4153f39dfeb5b9af474bfa13e0a"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Mon Jun 12 21:34:55 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Jul 25 20:23:59 2017 +0000"
      },
      "message": "gma skl: Add I_boost configuration\n\nHardcoded to 1 since we don\u0027t support Skylake-Y (ULX).\n\nChange-Id: I22fa056531cac18828c867f9c9f5745ec424d38c\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/20168\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\n"
    },
    {
      "commit": "01b680ff020b1bcc9e5d8a864affd47bac75488b",
      "tree": "7800b9c5ed6c760e2f7f81335b17b94c66d9e09f",
      "parents": [
        "247adf39f6172aace09aef819c245d92263a86f4"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Jun 09 16:24:22 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Jul 25 20:20:27 2017 +0000"
      },
      "message": "gma hsw+: Add boilerplate for DDI buffer translations\n\nChange-Id: I8fcba64a3c663b9eea7fb11088c62ea584d63e04\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/20129\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\n"
    },
    {
      "commit": "fdd93659e03396051940988de328f28cdb7d448c",
      "tree": "e20caca16f761188abb51d83efec2ec06ccb8afd",
      "parents": [
        "afadcace9e96289e3aff808c4fac5830c11bdc6c"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Wed Feb 08 13:41:38 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 15:24:14 2017 +0200"
      },
      "message": "gma broxton: Add signal level control for DDI PHYs\n\nOther than for the DDIs of the Core processor series, we don\u0027t select\nsignal levels from a preconfigured set but have to program the indivi-\ndual values.\n\nChange-Id: I3ab4d5e2ed47db0d4ce47a17c4a5fb08b5416bc2\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18425\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "afadcace9e96289e3aff808c4fac5830c11bdc6c",
      "tree": "9cb10bccb194c7504a14c6f7e6f7fd7d97d3e0e6",
      "parents": [
        "4b0239f549c99b1c393f099fe21c7055860fbe7a"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Wed Feb 08 13:41:38 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 15:23:51 2017 +0200"
      },
      "message": "gma broxton: Implement pre-PLL setup for DDI PHYs\n\nSome lane configuration that\u0027s supposed to happen before enabling\nthe display PLL.\n\nChange-Id: I08ec3ac26164061b19d695ab600d6bb9eeadd7ad\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18424\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "4b0239f549c99b1c393f099fe21c7055860fbe7a",
      "tree": "b76eeed11f3323131d984f59a0bd9f84d50811b2",
      "parents": [
        "f6266004f9c8dcbb7493b409de02048ef209387e"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Tue Feb 07 18:26:51 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 15:23:33 2017 +0200"
      },
      "message": "gma broxton: Fill in port PLL configuration\n\nPLL parameter selection is a much simplified version of what\u0027s done in\ni915 on Linux. We just assume the error in the resulting clock of a\nvalid parameter tuple is always small enough. Trying to speak mathe-\nmatically, since the only calculated parameter M2 is given as a frac-\ntion of 2^22, the error should stay below 2^-22.\n\nAs the PLLs are tied to specific DDI ports, they won\u0027t ever be shared\namong ports and the allocation boils down to just configuring the PLL.\n\nChange-Id: I206675506f1dbbb57d65bfdc308de1891ccbf61a\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18423\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "f6266004f9c8dcbb7493b409de02048ef209387e",
      "tree": "085df262f70edf1296143f247d2b4e2ee830add4",
      "parents": [
        "408204409b3324ae6ae7043826ee5ab7bb45bb2f"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Feb 03 12:17:28 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 15:23:22 2017 +0200"
      },
      "message": "gma broxton: Implement DDI PHY power handling\n\nDDI PHYs is a concept common to current Atom processor series. It\nseems the PHYs are implemented on the same die as the graphics core\nbut still need to be configured separately. Based on the assumption\nthat we start with disabled PHYs and it was always us if they are\nenabled, we only have to do a small share of what Linux\u0027 i915 does.\n\nv2: Wait for GRC done only if we want to copy its results.\n\nChange-Id: I1e59f80daa08dc64b8c3dff34202ace5dd4c5f73\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18422\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "408204409b3324ae6ae7043826ee5ab7bb45bb2f",
      "tree": "771cd2b63dc548d61a0d3a42f7bce72c7ed3acd6",
      "parents": [
        "21da5741378af7c9f8db23b55aa316a905ae9183"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Jan 20 14:00:53 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 15:22:31 2017 +0200"
      },
      "message": "gma broxton: Start off with power domains and CDClk\n\nIt\u0027s close to the respective code for Skylake but still different\nenough for a separate implementation. We start with a default CDClk\nof 288MHz which is enough for resolutions up to 2560x1600.\n\nChange-Id: I44364191236f421b2b89c9a019a50713f7c20525\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18243\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "bcb2c47c5120ed32d8d9a42990acc3f16f202ad9",
      "tree": "b2b079993c0e44fa3b9e70cb3b7bc2648f25d924",
      "parents": [
        "31a5217d39f95b51dc1fbe452f0e169507ca95d7"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Thu Feb 02 16:39:26 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Mar 14 11:54:47 2017 +0100"
      },
      "message": "gma registers: Add generic Wait() procedure\n\nAdd a more generic Wait() procedure that waits for some masked bits of\na register to hold a specific value.\n\nChange-Id: Iafefce3da8907e7edf00c68e7a8b650aa7bcd372\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18419\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "fbb422015506b6c175ff35d084e5cf267dfc0096",
      "tree": "800db7e4028ed730b7c4c10d08e0252062fd5eae",
      "parents": [
        "3675db58aa729bfb565b61389d3b2568360095af"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Mon Nov 07 15:08:26 2016 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Dec 05 12:35:25 2016 +0100"
      },
      "message": "gma: Implement Ivy Bridge VGA plane workaround\n\nIt\u0027s a documented requirement, even though it doesn\u0027t seem necessary.\n\nChange-Id: Id4f579c1ca34633ee00c771b39e6ff45cdcfbf69\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17277\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\n"
    },
    {
      "commit": "f54d0962018b0443973f84e525e0d112ce956800",
      "tree": "80d5b86e918fab1d92d7455eec2c3590c0d354a8",
      "parents": [
        "125a29e84242900a5556e8a068227e59420c3e1c"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Thu Oct 20 14:17:18 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Oct 29 01:21:38 2016 +0200"
      },
      "message": "gma: Program PCH_RAWCLK_FREQ register\n\nThis seems to be a scratchpad register to tell later drivers which\nfrequency the platform uses. Linux reads this but never writes the\nregister.\n\nChange-Id: I55af7c7b675da580c7f52d9997262b232019132c\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17071\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\n"
    },
    {
      "commit": "125a29e84242900a5556e8a068227e59420c3e1c",
      "tree": "925c85a1e9a5dc0506c9ccd26cd8ba4e05dd3d33",
      "parents": [
        "be4eaddc67ee3a11b1222db049cd8830491363d9"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Tue Oct 18 00:23:54 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Oct 20 13:05:15 2016 +0200"
      },
      "message": "Relicense libgfxinit under GPL v2+\n\nChange-Id: I5d683dda83d23e89955a4d840b5570bd8642834a\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17052\nReviewed-by: Paul Menzel \u003cpaulepanter@users.sourceforge.net\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Patrick Georgi \u003cpgeorgi@google.com\u003e\n"
    },
    {
      "commit": "83693c8d7d87f5cebe120abdf25951c9e212b319",
      "tree": "249eff589087c2ed8deeeeda1710ff49a3c3c810",
      "parents": [],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Sat Oct 08 22:17:55 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Oct 09 11:34:25 2016 +0200"
      },
      "message": "Initial upstream commit\n\nThe history contained unlicensed code so everything got squashed, sorry.\n\nChange-Id: I9f5775208f9df6fb29074bf3bc498f68cb17b3a0\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\n"
    }
  ]
}