)]}'
{
  "log": [
    {
      "commit": "3f86b0b121ff5f07d5d1ab5c1b210ea92620bb30",
      "tree": "8bef2905e89040626ee649e5ae1f1f85c1488112",
      "parents": [
        "c0db994900fe9dabff9efd1b7fc547288a68c6c0"
      ],
      "author": {
        "name": "Angel Pons",
        "email": "th3fanbus@gmail.com",
        "time": "Sat Jul 18 00:22:32 2020 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jul 19 17:38:39 2020 +0000"
      },
      "message": "Move `PSR_Off` out of `Power_And_Clocks_Haswell`\n\nAllowing other platforms to use the Haswell-specific power and clocks\npackage precludes with\u0027ing other Haswell-specific units unless they are\nplaced under `haswell_shared` as well. This unnecessarily forces several\nimplementation-specific details to be public, breaking encapsulation.\n\nThe only benefit is that the `PSR_Off` procedure gets to be shared.\nHowever, we can allow reusing said procedure without having to destroy\nencapsulation, by moving it elsewhere. As the SRD/PSR registers are tied\nto transcoders, place `PSR_Off` and the corresponding definitions to the\ncommon `Transcoder` package. Also update the callers of this procedure\nto refer to the `Transcoder` package, and then drop the visibility of\nthe power and clocks package for Haswell.\n\nChange-Id: I7483409b8b7db58874cbba3c0a7edb1968bba456\nSigned-off-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/libgfxinit/+/43563\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "730f17c6abf9be8b43734dbfabe90256d479fecb",
      "tree": "785a5838e616535e58743d977745733addea6aed",
      "parents": [
        "01b680ff020b1bcc9e5d8a864affd47bac75488b"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Mon Jun 12 15:51:25 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Jul 25 20:21:27 2017 +0000"
      },
      "message": "gma hsw bdw: Add DDI buffer translations\n\nChange-Id: Ib87be86e2853e6b9df7e19dd9cb80d4f7effefc5\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/20166\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\n"
    },
    {
      "commit": "01b680ff020b1bcc9e5d8a864affd47bac75488b",
      "tree": "7800b9c5ed6c760e2f7f81335b17b94c66d9e09f",
      "parents": [
        "247adf39f6172aace09aef819c245d92263a86f4"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Jun 09 16:24:22 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Jul 25 20:20:27 2017 +0000"
      },
      "message": "gma hsw+: Add boilerplate for DDI buffer translations\n\nChange-Id: I8fcba64a3c663b9eea7fb11088c62ea584d63e04\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/20129\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\n"
    },
    {
      "commit": "1c3b9285ceb3ff7bbb6dab8d9805ca3bda9d0ff3",
      "tree": "78a2fe0e2c18db7ad8bfd5bd81bee78ddb2f661a",
      "parents": [
        "fdd93659e03396051940988de328f28cdb7d448c"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Thu Feb 09 13:57:04 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 15:24:28 2017 +0200"
      },
      "message": "gma broxton: Add final glue\n\nAdd new configuration flags for Broxton and hook up its DDI_Phy\nimplementation in the shared Haswell DDI code. Haswell and Skylake\nget DDI_Phy stubs.\n\nTested (in Linux userspace) on ASRock J3455-ITX which exposes the\nfollowing ports:\n  o VGA through an active eDP to VGA converter chip\n  o HDMI 2.0 through an active DP to HDMI converter chip\n  o DVI-D connected to the SoC\n\nChange-Id: If72b228c6a4c45487261e6e7435d281ec2d97f38\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18426\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "83693c8d7d87f5cebe120abdf25951c9e212b319",
      "tree": "249eff589087c2ed8deeeeda1710ff49a3c3c810",
      "parents": [],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Sat Oct 08 22:17:55 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Oct 09 11:34:25 2016 +0200"
      },
      "message": "Initial upstream commit\n\nThe history contained unlicensed code so everything got squashed, sorry.\n\nChange-Id: I9f5775208f9df6fb29074bf3bc498f68cb17b3a0\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\n"
    }
  ]
}