)]}'
{
  "log": [
    {
      "commit": "408204409b3324ae6ae7043826ee5ab7bb45bb2f",
      "tree": "771cd2b63dc548d61a0d3a42f7bce72c7ed3acd6",
      "parents": [
        "21da5741378af7c9f8db23b55aa316a905ae9183"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Jan 20 14:00:53 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 15:22:31 2017 +0200"
      },
      "message": "gma broxton: Start off with power domains and CDClk\n\nIt\u0027s close to the respective code for Skylake but still different\nenough for a separate implementation. We start with a default CDClk\nof 288MHz which is enough for resolutions up to 2560x1600.\n\nChange-Id: I44364191236f421b2b89c9a019a50713f7c20525\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18243\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    }
  ]
}
