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Nico Huber83693c82016-10-08 22:17:55 +02001--
Nico Huberfdb0df12018-02-07 14:30:34 +01002-- Copyright (C) 2015-2018 secunet Security Networks AG
Nico Huber83693c82016-10-08 22:17:55 +02003--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +02006-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +02008--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with HW.Debug;
16with GNAT.Source_Info;
17
18with HW.GFX.GMA.Config;
Nico Huber7ad2d652016-12-07 15:19:32 +010019with HW.GFX.GMA.Transcoder;
Nico Huber83693c82016-10-08 22:17:55 +020020
21package body HW.GFX.GMA.Pipe_Setup is
22
Nico Huberfbb42202016-11-07 15:08:26 +010023 ILK_DISPLAY_CHICKEN1_VGA_MASK : constant := 7 * 2 ** 29;
24 ILK_DISPLAY_CHICKEN1_VGA_ENABLE : constant := 5 * 2 ** 29;
25 ILK_DISPLAY_CHICKEN2_VGA_MASK : constant := 1 * 2 ** 25;
26 ILK_DISPLAY_CHICKEN2_VGA_ENABLE : constant := 0 * 2 ** 25;
27
Nico Huber7ad2d652016-12-07 15:19:32 +010028 DSPCNTR_ENABLE : constant := 1 * 2 ** 31;
29 DSPCNTR_GAMMA_CORRECTION : constant := 1 * 2 ** 30;
Nico Huber7ad2d652016-12-07 15:19:32 +010030 DSPCNTR_FORMAT_MASK : constant := 15 * 2 ** 26;
Nico Huberab69e362018-05-29 21:20:30 +020031 DSPCNTR_DISABLE_TRICKLE_FEED : constant := 1 * 2 ** 14;
32 DSPCNTR_TILED_SURFACE_LINEAR : constant := 0 * 2 ** 10;
33 DSPCNTR_TILED_SURFACE_X_TILED : constant := 1 * 2 ** 10;
34
35 DSPCNTR_TILED_SURFACE : constant array (Tiling_Type) of Word32 :=
36 (Linear => DSPCNTR_TILED_SURFACE_LINEAR,
37 X_Tiled => DSPCNTR_TILED_SURFACE_X_TILED,
38 Y_Tiled => 0); -- unsupported
Nico Huber83693c82016-10-08 22:17:55 +020039
40 DSPCNTR_MASK : constant Word32 :=
41 DSPCNTR_ENABLE or
42 DSPCNTR_GAMMA_CORRECTION or
43 DSPCNTR_FORMAT_MASK or
Nico Huberab69e362018-05-29 21:20:30 +020044 DSPCNTR_DISABLE_TRICKLE_FEED or
45 DSPCNTR_TILED_SURFACE_X_TILED;
Nico Huber83693c82016-10-08 22:17:55 +020046
47 PLANE_CTL_PLANE_ENABLE : constant := 1 * 2 ** 31;
48 PLANE_CTL_SRC_PIX_FMT_RGB_32B_8888 : constant := 4 * 2 ** 24;
49 PLANE_CTL_PLANE_GAMMA_DISABLE : constant := 1 * 2 ** 13;
Nico Huber0164b022017-08-24 15:12:51 +020050 PLANE_CTL_TILED_SURFACE_MASK : constant := 7 * 2 ** 10;
51 PLANE_CTL_TILED_SURFACE_LINEAR : constant := 0 * 2 ** 10;
52 PLANE_CTL_TILED_SURFACE_X_TILED : constant := 1 * 2 ** 10;
53 PLANE_CTL_TILED_SURFACE_Y_TILED : constant := 4 * 2 ** 10;
54 PLANE_CTL_TILED_SURFACE_YF_TILED : constant := 5 * 2 ** 10;
55
56 PLANE_CTL_TILED_SURFACE : constant array (Tiling_Type) of Word32 :=
57 (Linear => PLANE_CTL_TILED_SURFACE_LINEAR,
58 X_Tiled => PLANE_CTL_TILED_SURFACE_X_TILED,
59 Y_Tiled => PLANE_CTL_TILED_SURFACE_Y_TILED);
Nico Huber83693c82016-10-08 22:17:55 +020060
Nico Huber9b479412017-08-27 11:55:56 +020061 PLANE_CTL_PLANE_ROTATION_MASK : constant := 3 * 2 ** 0;
62 PLANE_CTL_PLANE_ROTATION : constant array (Rotation_Type) of Word32 :=
63 (No_Rotation => 0 * 2 ** 0,
64 Rotated_90 => 1 * 2 ** 0,
65 Rotated_180 => 2 * 2 ** 0,
66 Rotated_270 => 3 * 2 ** 0);
67
Nico Huber83693c82016-10-08 22:17:55 +020068 PLANE_WM_ENABLE : constant := 1 * 2 ** 31;
69 PLANE_WM_LINES_SHIFT : constant := 14;
70 PLANE_WM_LINES_MASK : constant := 16#001f# * 2 ** 14;
71 PLANE_WM_BLOCKS_MASK : constant := 16#03ff# * 2 ** 0;
72
Nico Huber33912aa2016-12-06 20:36:23 +010073 VGA_SR_INDEX : constant := 16#03c4#;
74 VGA_SR_DATA : constant := 16#03c5#;
75 VGA_SR01 : constant := 16#01#;
76 VGA_SR01_SCREEN_OFF : constant := 1 * 2 ** 5;
Nico Huber3675db52016-11-04 16:27:29 +010077
78 VGA_CONTROL_VGA_DISPLAY_DISABLE : constant := 1 * 2 ** 31;
79 VGA_CONTROL_BLINK_DUTY_CYCLE_MASK : constant := 16#0003# * 2 ** 6;
80 VGA_CONTROL_BLINK_DUTY_CYCLE_50 : constant := 2 * 2 ** 6;
81 VGA_CONTROL_VSYNC_BLINK_RATE_MASK : constant := 16#003f# * 2 ** 0;
82
Nico Huber4dc4c612018-01-10 15:55:09 +010083 CUR_CTL_PIPE_SELECT : constant array (Pipe_Index) of Word32 :=
84 (Primary => 0 * 2 ** 28,
85 Secondary => 1 * 2 ** 28,
86 Tertiary => 2 * 2 ** 28);
87 CUR_CTL_MODE : constant array (Cursor_Mode, Cursor_Size) of Word32 :=
88 (No_Cursor => (others => 16#00#),
89 ARGB_Cursor =>
90 (Cursor_64x64 => 16#27#,
91 Cursor_128x128 => 16#22#,
92 Cursor_256x256 => 16#23#));
93
94 function CUR_POS_Y (Y : Int32) return Word32 is
95 ((if Y >= 0 then 0 else 1 * 2 ** 31) or Shift_Left (Word32 (abs Y), 16))
96 with
97 Pre => Y > Int32'First;
98 function CUR_POS_X (X : Int32) return Word32 is
99 ((if X >= 0 then 0 else 1 * 2 ** 15) or Word32 (abs X))
100 with
101 Pre => X > Int32'First;
102
Nico Huber3675db52016-11-04 16:27:29 +0100103 subtype VGA_Cycle_Count is Pos32 range 2 .. 128;
104 function VGA_CONTROL_VSYNC_BLINK_RATE
105 (Cycles : VGA_Cycle_Count)
106 return Word32
107 is
108 begin
109 return Word32 (Cycles) / 2 - 1;
110 end VGA_CONTROL_VSYNC_BLINK_RATE;
111
Nico Huber7ad2d652016-12-07 15:19:32 +0100112 PF_CTRL_ENABLE : constant := 1 * 2 ** 31;
113 PF_CTRL_PIPE_SELECT_MASK : constant := 3 * 2 ** 29;
114 PF_CTRL_FILTER_MED : constant := 1 * 2 ** 23;
Nico Huber83693c82016-10-08 22:17:55 +0200115
Nico Huber7ad2d652016-12-07 15:19:32 +0100116 PS_CTRL_ENABLE_SCALER : constant := 1 * 2 ** 31;
117 PS_CTRL_SCALER_MODE_7X5_EXTENDED : constant := 1 * 2 ** 28;
118 PS_CTRL_FILTER_SELECT_MEDIUM_2 : constant := 1 * 2 ** 23;
Nico Huber83693c82016-10-08 22:17:55 +0200119
Arthur Heymansd5198442018-03-28 17:05:12 +0200120 GMCH_PFIT_CONTROL_SELECT_MASK : constant := 3 * 2 ** 29;
121 GMCH_PFIT_CONTROL_SELECT_PIPE_A : constant := 0 * 2 ** 29;
122 GMCH_PFIT_CONTROL_SELECT_PIPE_B : constant := 1 * 2 ** 29;
Nico Huber958c5642018-06-02 16:59:31 +0200123 GMCH_PFIT_CONTROL_SCALING_MASK : constant := 3 * 2 ** 26;
124 GMCH_PFIT_CONTROL_SCALING : constant array (Scaling_Aspect) of Word32 :=
125 (Uniform => 0 * 2 ** 26,
126 Pillarbox => 2 * 2 ** 26,
127 Letterbox => 3 * 2 ** 26);
Arthur Heymansd5198442018-03-28 17:05:12 +0200128
Arthur Heymansdfcdd772018-03-28 16:42:50 +0200129 VGACNTRL_REG : constant Registers.Registers_Index :=
130 (if Config.Has_GMCH_VGACNTRL then
131 Registers.GMCH_VGACNTRL
132 else Registers.CPU_VGACNTRL);
133
Nico Huber83693c82016-10-08 22:17:55 +0200134 ---------------------------------------------------------------------------
135
Nico Huber83693c82016-10-08 22:17:55 +0200136 function PLANE_WM_LINES (Lines : Natural) return Word32 is
137 begin
138 return Shift_Left (Word32 (Lines), PLANE_WM_LINES_SHIFT)
139 and PLANE_WM_LINES_MASK;
140 end PLANE_WM_LINES;
141
142 function PLANE_WM_BLOCKS (Blocks : Natural) return Word32 is
143 begin
144 return Word32 (Blocks) and PLANE_WM_BLOCKS_MASK;
145 end PLANE_WM_BLOCKS;
146
147 ---------------------------------------------------------------------------
148
Nico Huberc5c767a2018-06-03 01:09:04 +0200149 function Encode (LSW, MSW : Pos32) return Word32 is
Nico Huber83693c82016-10-08 22:17:55 +0200150 begin
Nico Huber7ad2d652016-12-07 15:19:32 +0100151 return Shift_Left (Word32 (MSW) - 1, 16) or (Word32 (LSW) - 1);
Nico Huber83693c82016-10-08 22:17:55 +0200152 end Encode;
153
154 ----------------------------------------------------------------------------
155
Nico Huber83693c82016-10-08 22:17:55 +0200156 procedure Clear_Watermarks (Controller : Controller_Type) is
157 begin
Nico Huber4dc4c612018-01-10 15:55:09 +0100158 Registers.Write (Controller.CUR_BUF_CFG, 16#0000_0000#);
159 for Level in WM_Levels loop
160 Registers.Write (Controller.CUR_WM (Level), 16#0000_0000#);
Nico Huber83693c82016-10-08 22:17:55 +0200161 end loop;
Nico Huber4dc4c612018-01-10 15:55:09 +0100162 Registers.Write (Controller.PLANE_BUF_CFG, 16#0000_0000#);
163 for Level in WM_Levels loop
164 Registers.Write (Controller.PLANE_WM (Level), 16#0000_0000#);
165 end loop;
166 Registers.Write (Controller.WM_LINETIME, 16#0000_0000#);
Nico Huber83693c82016-10-08 22:17:55 +0200167 end Clear_Watermarks;
168
169 procedure Setup_Watermarks (Controller : Controller_Type)
170 is
Nico Huberf3e23662016-12-05 21:33:03 +0100171 type Per_Plane_Buffer_Range is array (Pipe_Index) of Word32;
Nico Huber4dc4c612018-01-10 15:55:09 +0100172 Cur_Buffer_Range : constant Per_Plane_Buffer_Range :=
173 (Primary => Shift_Left ( 7, 16) or 0,
174 Secondary => Shift_Left (167, 16) or 160,
175 Tertiary => Shift_Left (327, 16) or 320);
176 Plane_Buffer_Range : constant Per_Plane_Buffer_Range :=
177 (Primary => Shift_Left (159, 16) or 8,
178 Secondary => Shift_Left (319, 16) or 168,
179 Tertiary => Shift_Left (479, 16) or 328);
Nico Huber83693c82016-10-08 22:17:55 +0200180 begin
181 Registers.Write
182 (Register => Controller.PLANE_BUF_CFG,
Nico Huber4dc4c612018-01-10 15:55:09 +0100183 Value => Plane_Buffer_Range (Controller.Pipe));
Nico Huber83693c82016-10-08 22:17:55 +0200184 Registers.Write
185 (Register => Controller.PLANE_WM (0),
186 Value => PLANE_WM_ENABLE or
187 PLANE_WM_LINES (2) or
Nico Huber4dc4c612018-01-10 15:55:09 +0100188 PLANE_WM_BLOCKS (152));
189 Registers.Write
190 (Register => Controller.CUR_BUF_CFG,
191 Value => Cur_Buffer_Range (Controller.Pipe));
192 Registers.Write
193 (Register => Controller.CUR_WM (0),
194 Value => PLANE_WM_ENABLE or
195 PLANE_WM_LINES (2) or
196 PLANE_WM_BLOCKS (8));
Nico Huber83693c82016-10-08 22:17:55 +0200197 end Setup_Watermarks;
198
199 ----------------------------------------------------------------------------
200
Nico Huber3675db52016-11-04 16:27:29 +0100201 procedure Setup_Hires_Plane
Nico Huber6a4dfc82016-11-04 15:50:58 +0100202 (Controller : Controller_Type;
Nico Huber0164b022017-08-24 15:12:51 +0200203 FB : HW.GFX.Framebuffer_Type)
Nico Huber83693c82016-10-08 22:17:55 +0200204 with
205 Global => (In_Out => Registers.Register_State),
206 Depends =>
207 (Registers.Register_State
208 =>+
209 (Registers.Register_State,
210 Controller,
Nico Huber9b479412017-08-27 11:55:56 +0200211 FB)),
Nico Huber5ef4d602017-12-13 13:56:47 +0100212 Pre => FB.Height + FB.Start_Y <= FB.V_Stride
Nico Huber83693c82016-10-08 22:17:55 +0200213 is
214 -- FIXME: setup correct format, based on framebuffer RGB format
215 Format : constant Word32 := 6 * 2 ** 26;
216 PRI : Word32 := DSPCNTR_ENABLE or Format;
Nico Huber83693c82016-10-08 22:17:55 +0200217 begin
218 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
219
Nico Huber83693c82016-10-08 22:17:55 +0200220 if Config.Has_Plane_Control then
Nico Huber9b479412017-08-27 11:55:56 +0200221 declare
Nico Huber34be6542017-12-13 09:26:24 +0100222 Stride, Offset : Word32;
Nico Huberc5c767a2018-06-03 01:09:04 +0200223 Width : constant Width_Type := Rotated_Width (FB);
224 Height : constant Width_Type := Rotated_Height (FB);
Nico Huber9b479412017-08-27 11:55:56 +0200225 begin
226 if Rotation_90 (FB) then
Nico Huber5ef4d602017-12-13 13:56:47 +0100227 Stride := Word32 (FB_Pitch (FB.V_Stride, FB));
228 Offset := Shift_Left (Word32 (FB.Start_X), 16) or
229 Word32 (FB.V_Stride - FB.Height - FB.Start_Y);
Nico Huber9b479412017-08-27 11:55:56 +0200230 else
Nico Huber5ef4d602017-12-13 13:56:47 +0100231 Stride := Word32 (FB_Pitch (FB.Stride, FB));
232 Offset := Shift_Left (Word32 (FB.Start_Y), 16) or
233 Word32 (FB.Start_X);
Nico Huber9b479412017-08-27 11:55:56 +0200234 end if;
235 Registers.Write
236 (Register => Controller.PLANE_CTL,
237 Value => PLANE_CTL_PLANE_ENABLE or
238 PLANE_CTL_SRC_PIX_FMT_RGB_32B_8888 or
239 PLANE_CTL_PLANE_GAMMA_DISABLE or
240 PLANE_CTL_TILED_SURFACE (FB.Tiling) or
241 PLANE_CTL_PLANE_ROTATION (FB.Rotation));
242 Registers.Write (Controller.PLANE_OFFSET, Offset);
243 Registers.Write (Controller.PLANE_SIZE, Encode (Width, Height));
244 Registers.Write (Controller.PLANE_STRIDE, Stride);
245 Registers.Write (Controller.PLANE_POS, 16#0000_0000#);
Nico Huber34be6542017-12-13 09:26:24 +0100246 Registers.Write (Controller.PLANE_SURF, FB.Offset and 16#ffff_f000#);
Nico Huber9b479412017-08-27 11:55:56 +0200247 end;
Nico Huber83693c82016-10-08 22:17:55 +0200248 else
249 if Config.Disable_Trickle_Feed then
250 PRI := PRI or DSPCNTR_DISABLE_TRICKLE_FEED;
251 end if;
252 -- for now, just disable gamma LUT (can't do anything
253 -- useful without colorimetry information from display)
254 Registers.Unset_And_Set_Mask
255 (Register => Controller.DSPCNTR,
256 Mask_Unset => DSPCNTR_MASK,
Nico Huberab69e362018-05-29 21:20:30 +0200257 Mask_Set => PRI or DSPCNTR_TILED_SURFACE (FB.Tiling));
Nico Huber83693c82016-10-08 22:17:55 +0200258
Nico Huber0164b022017-08-24 15:12:51 +0200259 Registers.Write
260 (Controller.DSPSTRIDE, Word32 (Pixel_To_Bytes (FB.Stride, FB)));
Nico Huberab69e362018-05-29 21:20:30 +0200261 if Config.Has_DSP_Linoff and then FB.Tiling = Linear then
Nico Huber5ef4d602017-12-13 13:56:47 +0100262 Registers.Write
263 (Register => Controller.DSPLINOFF,
264 Value => Word32 (Pixel_To_Bytes
265 (FB.Start_Y * FB.Stride + FB.Start_X, FB)));
266 Registers.Write (Controller.DSPTILEOFF, 0);
267 else
Nico Huberab69e362018-05-29 21:20:30 +0200268 if Config.Has_DSP_Linoff then
269 Registers.Write (Controller.DSPLINOFF, 0);
270 end if;
Nico Huber5ef4d602017-12-13 13:56:47 +0100271 Registers.Write
272 (Register => Controller.DSPTILEOFF,
273 Value => Shift_Left (Word32 (FB.Start_Y), 16) or
274 Word32 (FB.Start_X));
Nico Huber83693c82016-10-08 22:17:55 +0200275 end if;
Nico Huber8fd92a12018-01-02 14:02:59 +0100276 Registers.Write (Controller.DSPSURF, FB.Offset and 16#ffff_f000#);
Nico Huber83693c82016-10-08 22:17:55 +0200277 end if;
Nico Huber3675db52016-11-04 16:27:29 +0100278 end Setup_Hires_Plane;
279
280 procedure Setup_Display
Nico Huber113a14b2016-12-06 21:59:15 +0100281 (Controller : Controller_Type;
282 Framebuffer : Framebuffer_Type;
283 Dither_BPC : BPC_Type;
284 Dither : Boolean)
Nico Huber3675db52016-11-04 16:27:29 +0100285 with
Nico Huber9b479412017-08-27 11:55:56 +0200286 Pre =>
287 Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or
Nico Huber5ef4d602017-12-13 13:56:47 +0100288 Framebuffer.Height + Framebuffer.Start_Y <= Framebuffer.V_Stride
Nico Huber3675db52016-11-04 16:27:29 +0100289 is
290 use type Word8;
291
292 Reg8 : Word8;
293 begin
294 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
295
296 if Config.Has_Plane_Control then
297 Setup_Watermarks (Controller);
298 end if;
299
300 if Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET then
Nico Huberfbb42202016-11-07 15:08:26 +0100301 if Config.VGA_Plane_Workaround then
302 Registers.Unset_And_Set_Mask
303 (Register => Registers.ILK_DISPLAY_CHICKEN1,
304 Mask_Unset => ILK_DISPLAY_CHICKEN1_VGA_MASK,
305 Mask_Set => ILK_DISPLAY_CHICKEN1_VGA_ENABLE);
306 Registers.Unset_And_Set_Mask
307 (Register => Registers.ILK_DISPLAY_CHICKEN2,
308 Mask_Unset => ILK_DISPLAY_CHICKEN2_VGA_MASK,
309 Mask_Set => ILK_DISPLAY_CHICKEN2_VGA_ENABLE);
310 end if;
311
Nico Huber3675db52016-11-04 16:27:29 +0100312 Registers.Unset_And_Set_Mask
Arthur Heymansdfcdd772018-03-28 16:42:50 +0200313 (Register => VGACNTRL_REG,
Nico Huber3675db52016-11-04 16:27:29 +0100314 Mask_Unset => VGA_CONTROL_VGA_DISPLAY_DISABLE or
315 VGA_CONTROL_BLINK_DUTY_CYCLE_MASK or
316 VGA_CONTROL_VSYNC_BLINK_RATE_MASK,
317 Mask_Set => VGA_CONTROL_BLINK_DUTY_CYCLE_50 or
318 VGA_CONTROL_VSYNC_BLINK_RATE (30));
319
320 Port_IO.OutB (VGA_SR_INDEX, VGA_SR01);
321 Port_IO.InB (Reg8, VGA_SR_DATA);
322 Port_IO.OutB (VGA_SR_DATA, Reg8 and not (VGA_SR01_SCREEN_OFF));
323 else
Nico Huber6a4dfc82016-11-04 15:50:58 +0100324 Setup_Hires_Plane (Controller, Framebuffer);
Nico Huber3675db52016-11-04 16:27:29 +0100325 end if;
326
327 Registers.Write
328 (Register => Controller.PIPESRC,
329 Value => Encode
Nico Huber9b479412017-08-27 11:55:56 +0200330 (Rotated_Height (Framebuffer), Rotated_Width (Framebuffer)));
Nico Huber83693c82016-10-08 22:17:55 +0200331
Nico Huber113a14b2016-12-06 21:59:15 +0100332 if Config.Has_Pipeconf_Misc then
333 Registers.Write
334 (Register => Controller.PIPEMISC,
Nico Huber7ad2d652016-12-07 15:19:32 +0100335 Value => Transcoder.BPC_Conf (Dither_BPC, Dither));
Nico Huber113a14b2016-12-06 21:59:15 +0100336 end if;
Nico Huber83693c82016-10-08 22:17:55 +0200337 end Setup_Display;
338
339 ----------------------------------------------------------------------------
340
Nico Huber4dc4c612018-01-10 15:55:09 +0100341 procedure Update_Cursor
342 (Pipe : Pipe_Index;
343 FB : Framebuffer_Type;
344 Cursor : Cursor_Type)
345 is
346 begin
347 -- on some platforms writing CUR_CTL disables self-arming of CUR_POS
348 -- so keep it first
349 Registers.Write
350 (Register => Controllers (Pipe).CUR_CTL,
351 Value => CUR_CTL_PIPE_SELECT (Pipe) or
352 CUR_CTL_MODE (Cursor.Mode, Cursor.Size));
353 Place_Cursor (Pipe, FB, Cursor);
354 end Update_Cursor;
355
356 procedure Place_Cursor
357 (Pipe : Pipe_Index;
358 FB : Framebuffer_Type;
359 Cursor : Cursor_Type)
360 is
361 Width : constant Width_Type := Cursor_Width (Cursor.Size);
362 X : Int32 := Cursor.Center_X - Width / 2;
363 Y : Int32 := Cursor.Center_Y - Width / 2;
364 begin
365 -- off-screen cursor needs special care
366 if X <= -Width or Y <= -Width or
Nico Huberc5c767a2018-06-03 01:09:04 +0200367 X >= Rotated_Width (FB) or Y >= Rotated_Height (FB) or
Nico Huber4dc4c612018-01-10 15:55:09 +0100368 X > Config.Maximum_Cursor_X or Y > Config.Maximum_Cursor_Y
369 then
370 X := -Width;
371 Y := -Width;
372 end if;
373 Registers.Write
374 (Register => Controllers (Pipe).CUR_POS,
375 Value => CUR_POS_Y (Y) or CUR_POS_X (X));
376 -- write to CUR_BASE always arms other CUR_* registers
377 Registers.Write
378 (Register => Controllers (Pipe).CUR_BASE,
379 Value => Shift_Left (Word32 (Cursor.GTT_Offset), 12));
380 end Place_Cursor;
381
382 ----------------------------------------------------------------------------
383
Nico Huberc5c767a2018-06-03 01:09:04 +0200384 function Scale (Val, Max, Num, Denom : Width_Type)
385 return Width_Type is ((Val * Num) / Denom)
Nico Huberda1185e2018-06-03 01:07:46 +0200386 with
Nico Huberc5c767a2018-06-03 01:09:04 +0200387 Pre => Denom <= Num and Val * Num < Max * Denom,
Nico Huberda1185e2018-06-03 01:07:46 +0200388 Post => Scale'Result < Max;
389
Nico Huber4916e342016-11-04 14:37:53 +0100390 procedure Scale_Keep_Aspect
Nico Huberc5c767a2018-06-03 01:09:04 +0200391 (Width : out Width_Type;
392 Height : out Height_Type;
393 Max_Width : in Width_Type;
394 Max_Height : in Height_Type;
Nico Huber4916e342016-11-04 14:37:53 +0100395 Framebuffer : in Framebuffer_Type)
396 with
397 Pre =>
Nico Huberc5c767a2018-06-03 01:09:04 +0200398 Rotated_Width (Framebuffer) <= Max_Width and
399 Rotated_Height (Framebuffer) <= Max_Height,
Nico Huber4916e342016-11-04 14:37:53 +0100400 Post =>
401 Width <= Max_Width and Height <= Max_Height
402 is
Nico Huberc5c767a2018-06-03 01:09:04 +0200403 Src_Width : constant Width_Type := Rotated_Width (Framebuffer);
404 Src_Height : constant Height_Type := Rotated_Height (Framebuffer);
Nico Huber4916e342016-11-04 14:37:53 +0100405 begin
Nico Huberda1185e2018-06-03 01:07:46 +0200406 case Scaling_Type (Src_Width, Src_Height, Max_Width, Max_Height) is
407 when Letterbox =>
408 Width := Max_Width;
409 Height := Scale (Src_Height, Max_Height, Max_Width, Src_Width);
410 when Pillarbox =>
411 Width := Scale (Src_Width, Max_Width, Max_Height, Src_Height);
412 Height := Max_Height;
413 when Uniform =>
414 Width := Max_Width;
415 Height := Max_Height;
416 end case;
Nico Huber4916e342016-11-04 14:37:53 +0100417 end Scale_Keep_Aspect;
418
419 procedure Setup_Skylake_Pipe_Scaler
420 (Controller : in Controller_Type;
421 Mode : in HW.GFX.Mode_Type;
422 Framebuffer : in HW.GFX.Framebuffer_Type)
423 with
424 Pre =>
Nico Huber9b479412017-08-27 11:55:56 +0200425 Rotated_Width (Framebuffer) <= Mode.H_Visible and
426 Rotated_Height (Framebuffer) <= Mode.V_Visible
Nico Huber4916e342016-11-04 14:37:53 +0100427 is
Nico Huber7ad2d652016-12-07 15:19:32 +0100428 use type Registers.Registers_Invalid_Index;
429
Nico Huber4916e342016-11-04 14:37:53 +0100430 -- Enable 7x5 extended mode where possible:
431 Scaler_Mode : constant Word32 :=
432 (if Controller.PS_CTRL_2 /= Registers.Invalid_Register then
433 PS_CTRL_SCALER_MODE_7X5_EXTENDED else 0);
434
Nico Huberc5c767a2018-06-03 01:09:04 +0200435 Width_In : constant Width_Type := Rotated_Width (Framebuffer);
436 Height_In : constant Height_Type := Rotated_Height (Framebuffer);
Nico Huber9b479412017-08-27 11:55:56 +0200437
Nico Huber4916e342016-11-04 14:37:53 +0100438 -- We can scale up to 2.99x horizontally:
Nico Huber9b479412017-08-27 11:55:56 +0200439 Horizontal_Limit : constant Pos32 := (Width_In * 299) / 100;
Nico Huber4916e342016-11-04 14:37:53 +0100440 -- The third scaler is limited to 1.99x
441 -- vertical scaling for source widths > 2048:
442 Vertical_Limit : constant Pos32 :=
Nico Huber9b479412017-08-27 11:55:56 +0200443 (Height_In *
Nico Huber4916e342016-11-04 14:37:53 +0100444 (if Controller.PS_CTRL_2 = Registers.Invalid_Register and
Nico Huber9b479412017-08-27 11:55:56 +0200445 Width_In > 2048
Nico Huber4916e342016-11-04 14:37:53 +0100446 then
447 199
448 else
449 299)) / 100;
450
Nico Huberc5c767a2018-06-03 01:09:04 +0200451 Width : Width_Type;
452 Height : Height_Type;
Nico Huber4916e342016-11-04 14:37:53 +0100453 begin
454 -- Writes to WIN_SZ arm the PS registers.
455
456 Scale_Keep_Aspect
457 (Width => Width,
458 Height => Height,
Nico Huberc5c767a2018-06-03 01:09:04 +0200459 Max_Width => Pos32'Min (Horizontal_Limit, Mode.H_Visible),
460 Max_Height => Pos32'Min (Vertical_Limit, Mode.V_Visible),
Nico Huber4916e342016-11-04 14:37:53 +0100461 Framebuffer => Framebuffer);
462
463 Registers.Write
464 (Register => Controller.PS_CTRL_1,
465 Value => PS_CTRL_ENABLE_SCALER or Scaler_Mode);
466 Registers.Write
467 (Register => Controller.PS_WIN_POS_1,
468 Value =>
Nico Huberc5c767a2018-06-03 01:09:04 +0200469 Shift_Left (Word32 (Mode.H_Visible - Width) / 2, 16) or
470 Word32 (Mode.V_Visible - Height) / 2);
Nico Huber4916e342016-11-04 14:37:53 +0100471 Registers.Write
472 (Register => Controller.PS_WIN_SZ_1,
473 Value => Shift_Left (Word32 (Width), 16) or Word32 (Height));
474 end Setup_Skylake_Pipe_Scaler;
475
476 procedure Setup_Ironlake_Panel_Fitter
477 (Controller : in Controller_Type;
478 Mode : in HW.GFX.Mode_Type;
479 Framebuffer : in HW.GFX.Framebuffer_Type)
480 with
481 Pre =>
Nico Huber9b479412017-08-27 11:55:56 +0200482 Rotated_Width (Framebuffer) <= Mode.H_Visible and
483 Rotated_Height (Framebuffer) <= Mode.V_Visible
Nico Huber4916e342016-11-04 14:37:53 +0100484 is
485 -- Force 1:1 mapping of panel fitter:pipe
486 PF_Ctrl_Pipe_Sel : constant Word32 :=
487 (if Config.Has_PF_Pipe_Select then
488 (case Controller.PF_CTRL is
489 when Registers.PFA_CTL_1 => 0 * 2 ** 29,
490 when Registers.PFB_CTL_1 => 1 * 2 ** 29,
491 when Registers.PFC_CTL_1 => 2 * 2 ** 29,
492 when others => 0) else 0);
493
Nico Huberc5c767a2018-06-03 01:09:04 +0200494 Width : Width_Type;
495 Height : Height_Type;
Nico Huberfdb0df12018-02-07 14:30:34 +0100496 X, Y : Int32;
Nico Huber4916e342016-11-04 14:37:53 +0100497 begin
498 -- Writes to WIN_SZ arm the PF registers.
499
500 Scale_Keep_Aspect
501 (Width => Width,
502 Height => Height,
Nico Huberc5c767a2018-06-03 01:09:04 +0200503 Max_Width => Mode.H_Visible,
504 Max_Height => Mode.V_Visible,
Nico Huber4916e342016-11-04 14:37:53 +0100505 Framebuffer => Framebuffer);
506
Nico Huberfdb0df12018-02-07 14:30:34 +0100507 -- Do not scale to odd width (at least Haswell has trouble with this).
Nico Huberc5c767a2018-06-03 01:09:04 +0200508 if Width < Mode.H_Visible and Width mod 2 = 1 then
Nico Huberfdb0df12018-02-07 14:30:34 +0100509 Width := Width + 1;
510 end if;
511
Nico Huberc5c767a2018-06-03 01:09:04 +0200512 X := (Mode.H_Visible - Width) / 2;
513 Y := (Mode.V_Visible - Height) / 2;
Nico Huberfdb0df12018-02-07 14:30:34 +0100514
515 -- Hardware is picky about minimal horizontal gaps.
Nico Huberc5c767a2018-06-03 01:09:04 +0200516 if Mode.H_Visible - Width <= 3 then
517 Width := Mode.H_Visible;
Nico Huberfdb0df12018-02-07 14:30:34 +0100518 X := 0;
519 end if;
520
Nico Huber4916e342016-11-04 14:37:53 +0100521 Registers.Write
522 (Register => Controller.PF_CTRL,
523 Value => PF_CTRL_ENABLE or PF_Ctrl_Pipe_Sel or PF_CTRL_FILTER_MED);
524 Registers.Write
525 (Register => Controller.PF_WIN_POS,
Nico Huberfdb0df12018-02-07 14:30:34 +0100526 Value => Shift_Left (Word32 (X), 16) or Word32 (Y));
Nico Huber4916e342016-11-04 14:37:53 +0100527 Registers.Write
528 (Register => Controller.PF_WIN_SZ,
529 Value => Shift_Left (Word32 (Width), 16) or Word32 (Height));
530 end Setup_Ironlake_Panel_Fitter;
531
Arthur Heymansd5198442018-03-28 17:05:12 +0200532 procedure Setup_Gmch_Panel_Fitter
Nico Huber958c5642018-06-02 16:59:31 +0200533 (Controller : in Controller_Type;
534 Mode : in HW.GFX.Mode_Type;
535 Framebuffer : in HW.GFX.Framebuffer_Type)
Arthur Heymansd5198442018-03-28 17:05:12 +0200536 is
537 PF_Ctrl_Pipe_Sel : constant Word32 :=
538 (case Controller.Pipe is
539 when Primary => GMCH_PFIT_CONTROL_SELECT_PIPE_A,
540 when Secondary => GMCH_PFIT_CONTROL_SELECT_PIPE_B,
541 when others => 0);
Nico Huber958c5642018-06-02 16:59:31 +0200542
Arthur Heymansf70edda2018-08-21 18:37:00 +0200543 -- Work around a quirk:
544 -- In legacy VGA mode Pillarbox fails to display anything so just force
545 -- 'auto' mode on all displays, which will the output stretched to
546 -- fullscreen .
Nico Huber958c5642018-06-02 16:59:31 +0200547 PF_Ctrl_Scaling : constant Word32 :=
Arthur Heymansf70edda2018-08-21 18:37:00 +0200548 (if Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET then
549 GMCH_PFIT_CONTROL_SCALING (Uniform)
550 else
551 GMCH_PFIT_CONTROL_SCALING (Scaling_Type (Framebuffer, Mode)));
Nico Huber958c5642018-06-02 16:59:31 +0200552
Arthur Heymansd5198442018-03-28 17:05:12 +0200553 In_Use : Boolean;
554 begin
555 Registers.Is_Set_Mask
556 (Register => Registers.GMCH_PFIT_CONTROL,
557 Mask => PF_CTRL_ENABLE,
558 Result => In_Use);
559
560 if not In_Use then
561 Registers.Write
562 (Register => Registers.GMCH_PFIT_CONTROL,
Nico Huber958c5642018-06-02 16:59:31 +0200563 Value => PF_CTRL_ENABLE or PF_Ctrl_Pipe_Sel or PF_Ctrl_Scaling);
Arthur Heymansd5198442018-03-28 17:05:12 +0200564 else
Nico Huber7ba7bd62018-06-06 12:27:09 +0200565 pragma Debug (Debug.Put_Line
566 ("GMCH Pannel fitter already in use, skipping..."));
Arthur Heymansd5198442018-03-28 17:05:12 +0200567 end if;
568 end Setup_Gmch_Panel_Fitter;
569
Nico Huberf361ec82018-06-02 18:01:45 +0200570 procedure Gmch_Panel_Fitter_Pipe (Pipe : out Pipe_Index)
571 is
572 Used_For_Secondary : Boolean;
573 begin
574 Registers.Is_Set_Mask
575 (Register => Registers.GMCH_PFIT_CONTROL,
576 Mask => GMCH_PFIT_CONTROL_SELECT_PIPE_B,
577 Result => Used_For_Secondary);
578 Pipe := (if Used_For_Secondary then Secondary else Primary);
579 end;
580
Nico Huberb4b72792018-01-02 13:45:41 +0100581 procedure Panel_Fitter_Off (Controller : Controller_Type)
582 is
583 use type HW.GFX.GMA.Registers.Registers_Invalid_Index;
Nico Huberf361ec82018-06-02 18:01:45 +0200584 Pipe_Using_PF : Pipe_Index;
Nico Huberb4b72792018-01-02 13:45:41 +0100585 begin
586 -- Writes to WIN_SZ arm the PS/PF registers.
587 if Config.Has_Plane_Control then
588 Registers.Unset_Mask (Controller.PS_CTRL_1, PS_CTRL_ENABLE_SCALER);
589 Registers.Write (Controller.PS_WIN_SZ_1, 16#0000_0000#);
590 if Controller.PS_CTRL_2 /= Registers.Invalid_Register and
591 Controller.PS_WIN_SZ_2 /= Registers.Invalid_Register
592 then
593 Registers.Unset_Mask (Controller.PS_CTRL_2, PS_CTRL_ENABLE_SCALER);
594 Registers.Write (Controller.PS_WIN_SZ_2, 16#0000_0000#);
595 end if;
Arthur Heymansd5198442018-03-28 17:05:12 +0200596 elsif Config.Has_GMCH_PFIT_CONTROL then
Nico Huberf361ec82018-06-02 18:01:45 +0200597 Gmch_Panel_Fitter_Pipe (Pipe_Using_PF);
598 if Pipe_Using_PF = Controller.Pipe then
599 Registers.Unset_Mask (Registers.GMCH_PFIT_CONTROL, PF_CTRL_ENABLE);
Arthur Heymansd5198442018-03-28 17:05:12 +0200600 end if;
Nico Huberb4b72792018-01-02 13:45:41 +0100601 else
602 Registers.Unset_Mask (Controller.PF_CTRL, PF_CTRL_ENABLE);
603 Registers.Write (Controller.PF_WIN_SZ, 16#0000_0000#);
604 end if;
605 end Panel_Fitter_Off;
606
Nico Huber4916e342016-11-04 14:37:53 +0100607 procedure Setup_Scaling
608 (Controller : in Controller_Type;
609 Mode : in HW.GFX.Mode_Type;
610 Framebuffer : in HW.GFX.Framebuffer_Type)
611 with
612 Pre =>
Nico Huber9b479412017-08-27 11:55:56 +0200613 Rotated_Width (Framebuffer) <= Mode.H_Visible and
614 Rotated_Height (Framebuffer) <= Mode.V_Visible
Nico Huber4916e342016-11-04 14:37:53 +0100615 is
616 begin
Nico Huber3d06de82018-05-29 01:35:04 +0200617 if Requires_Scaling (Framebuffer, Mode) then
Nico Huber4916e342016-11-04 14:37:53 +0100618 if Config.Has_Plane_Control then
619 Setup_Skylake_Pipe_Scaler (Controller, Mode, Framebuffer);
Arthur Heymansd5198442018-03-28 17:05:12 +0200620 elsif Config.Has_GMCH_PFIT_CONTROL then
Nico Huber958c5642018-06-02 16:59:31 +0200621 Setup_Gmch_Panel_Fitter (Controller, Mode, Framebuffer);
Nico Huber4916e342016-11-04 14:37:53 +0100622 else
623 Setup_Ironlake_Panel_Fitter (Controller, Mode, Framebuffer);
624 end if;
Nico Huberb4b72792018-01-02 13:45:41 +0100625 else
626 Panel_Fitter_Off (Controller);
Nico Huber4916e342016-11-04 14:37:53 +0100627 end if;
628 end Setup_Scaling;
629
Nico Huberf361ec82018-06-02 18:01:45 +0200630 procedure Scaler_Available (Available : out Boolean; Pipe : Pipe_Index)
631 is
632 Pipe_Using_PF : Pipe_Index := Pipe_Index'First;
633 PF_Enabled : Boolean;
634 begin
635 if Config.Has_GMCH_PFIT_CONTROL then
636 Registers.Is_Set_Mask
637 (Register => Registers.GMCH_PFIT_CONTROL,
638 Mask => PF_CTRL_ENABLE,
639 Result => PF_Enabled);
640 if PF_Enabled then
641 Gmch_Panel_Fitter_Pipe (Pipe_Using_PF);
642 end if;
643
644 Available := not PF_Enabled or Pipe_Using_PF = Pipe;
645 else
646 Available := True;
647 end if;
648 end Scaler_Available;
649
Nico Huber4916e342016-11-04 14:37:53 +0100650 ----------------------------------------------------------------------------
651
Nico Huberf7f537e2018-01-02 14:15:43 +0100652 procedure Setup_FB
653 (Pipe : Pipe_Index;
654 Mode : Mode_Type;
655 Framebuffer : Framebuffer_Type)
656 is
657 -- Enable dithering if framebuffer BPC differs from port BPC,
658 -- as smooth gradients look really bad without.
659 Dither : constant Boolean := Framebuffer.BPC /= Mode.BPC;
660 begin
661 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
662
Nico Huber4dc4c612018-01-10 15:55:09 +0100663 -- Disable the cursor first.
664 Update_Cursor (Pipe, Framebuffer, Default_Cursor);
665
Nico Huberf7f537e2018-01-02 14:15:43 +0100666 Setup_Display (Controllers (Pipe), Framebuffer, Mode.BPC, Dither);
667 Setup_Scaling (Controllers (Pipe), Mode, Framebuffer);
668 end Setup_FB;
669
Nico Huber83693c82016-10-08 22:17:55 +0200670 procedure On
Nico Huberf3e23662016-12-05 21:33:03 +0100671 (Pipe : Pipe_Index;
Nico Huber83693c82016-10-08 22:17:55 +0200672 Port_Cfg : Port_Config;
Nico Huber4dc4c612018-01-10 15:55:09 +0100673 Framebuffer : Framebuffer_Type;
674 Cursor : Cursor_Type)
Nico Huber83693c82016-10-08 22:17:55 +0200675 is
676 begin
677 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
678
Nico Huber7ad2d652016-12-07 15:19:32 +0100679 Transcoder.Setup (Pipe, Port_Cfg);
Nico Huber83693c82016-10-08 22:17:55 +0200680
Nico Huberf7f537e2018-01-02 14:15:43 +0100681 Setup_FB (Pipe, Port_Cfg.Mode, Framebuffer);
Nico Huber4dc4c612018-01-10 15:55:09 +0100682 Update_Cursor (Pipe, Framebuffer, Cursor);
Nico Huber83693c82016-10-08 22:17:55 +0200683
Nico Huberabb16d92018-05-29 01:44:26 +0200684 Transcoder.On
685 (Pipe => Pipe,
686 Port_Cfg => Port_Cfg,
687 Dither => Framebuffer.BPC /= Port_Cfg.Mode.BPC,
688 Scale => Requires_Scaling (Framebuffer, Port_Cfg.Mode));
Nico Huber83693c82016-10-08 22:17:55 +0200689 end On;
690
691 ----------------------------------------------------------------------------
692
693 procedure Planes_Off (Controller : Controller_Type) is
694 begin
Nico Huber4dc4c612018-01-10 15:55:09 +0100695 Registers.Write (Controller.CUR_CTL, 16#0000_0000#);
696 if Config.Has_Cursor_FBC_Control then
697 Registers.Write (Controller.CUR_FBC_CTL, 16#0000_0000#);
698 end if;
Nico Huber7ad2d652016-12-07 15:19:32 +0100699 Registers.Unset_Mask (Controller.SPCNTR, DSPCNTR_ENABLE);
Nico Huber83693c82016-10-08 22:17:55 +0200700 if Config.Has_Plane_Control then
701 Clear_Watermarks (Controller);
702 Registers.Unset_Mask (Controller.PLANE_CTL, PLANE_CTL_PLANE_ENABLE);
703 Registers.Write (Controller.PLANE_SURF, 16#0000_0000#);
704 else
705 Registers.Unset_Mask (Controller.DSPCNTR, DSPCNTR_ENABLE);
706 end if;
707 end Planes_Off;
708
Nico Huber7ad2d652016-12-07 15:19:32 +0100709 procedure Off (Pipe : Pipe_Index)
Nico Huberf3e23662016-12-05 21:33:03 +0100710 is
Nico Huber83693c82016-10-08 22:17:55 +0200711 begin
712 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
713
Nico Huberf3e23662016-12-05 21:33:03 +0100714 Planes_Off (Controllers (Pipe));
Nico Huber7ad2d652016-12-07 15:19:32 +0100715 Transcoder.Off (Pipe);
Nico Huberf3e23662016-12-05 21:33:03 +0100716 Panel_Fitter_Off (Controllers (Pipe));
Nico Huber7ad2d652016-12-07 15:19:32 +0100717 Transcoder.Clk_Off (Pipe);
Nico Huber83693c82016-10-08 22:17:55 +0200718 end Off;
719
Nico Huber33912aa2016-12-06 20:36:23 +0100720 procedure Legacy_VGA_Off
721 is
722 use type HW.Word8;
723 Reg8 : Word8;
724 begin
725 Port_IO.OutB (VGA_SR_INDEX, VGA_SR01);
726 Port_IO.InB (Reg8, VGA_SR_DATA);
727 Port_IO.OutB (VGA_SR_DATA, Reg8 or VGA_SR01_SCREEN_OFF);
728 Time.U_Delay (100); -- PRM says 100us, Linux does 300
Arthur Heymansdfcdd772018-03-28 16:42:50 +0200729 Registers.Set_Mask (VGACNTRL_REG, VGA_CONTROL_VGA_DISPLAY_DISABLE);
Nico Huber33912aa2016-12-06 20:36:23 +0100730 end Legacy_VGA_Off;
731
Nico Huber83693c82016-10-08 22:17:55 +0200732 procedure All_Off
733 is
Nico Huber83693c82016-10-08 22:17:55 +0200734 begin
735 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
736
Nico Huber33912aa2016-12-06 20:36:23 +0100737 Legacy_VGA_Off;
738
Nico Huberf3e23662016-12-05 21:33:03 +0100739 for Pipe in Pipe_Index loop
740 Planes_Off (Controllers (Pipe));
Nico Huber7ad2d652016-12-07 15:19:32 +0100741 Transcoder.Off (Pipe);
Nico Huberf3e23662016-12-05 21:33:03 +0100742 Panel_Fitter_Off (Controllers (Pipe));
Nico Huber7ad2d652016-12-07 15:19:32 +0100743 Transcoder.Clk_Off (Pipe);
Nico Huber83693c82016-10-08 22:17:55 +0200744 end loop;
Nico Huber83693c82016-10-08 22:17:55 +0200745 end All_Off;
746
Nico Huber83693c82016-10-08 22:17:55 +0200747end HW.GFX.GMA.Pipe_Setup;