diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads
index 4e58651..70c27cc 100644
--- a/common/hw-gfx-gma-registers.ads
+++ b/common/hw-gfx-gma-registers.ads
@@ -283,18 +283,34 @@
       BXT_PORT_PLL_8_C,
       BXT_PORT_PLL_9_C,
       BXT_PORT_PLL_10_C,
+      BXT_PORT_PCS_DW10_01_B,
       BXT_PORT_PCS_DW12_01_B,
+      BXT_PORT_TX_DW2_LN0_B,
+      BXT_PORT_TX_DW3_LN0_B,
+      BXT_PORT_TX_DW4_LN0_B,
       BXT_PORT_TX_DW14_LN0_B,
       BXT_PORT_TX_DW14_LN1_B,
       BXT_PORT_TX_DW14_LN2_B,
       BXT_PORT_TX_DW14_LN3_B,
+      BXT_PORT_PCS_DW10_01_C,
       BXT_PORT_PCS_DW12_01_C,
+      BXT_PORT_TX_DW2_LN0_C,
+      BXT_PORT_TX_DW3_LN0_C,
+      BXT_PORT_TX_DW4_LN0_C,
       BXT_PORT_TX_DW14_LN0_C,
       BXT_PORT_TX_DW14_LN1_C,
       BXT_PORT_TX_DW14_LN2_C,
       BXT_PORT_TX_DW14_LN3_C,
+      BXT_PORT_PCS_DW10_GRP_B,
       BXT_PORT_PCS_DW12_GRP_B,
+      BXT_PORT_TX_DW2_GRP_B,
+      BXT_PORT_TX_DW3_GRP_B,
+      BXT_PORT_TX_DW4_GRP_B,
+      BXT_PORT_PCS_DW10_GRP_C,
       BXT_PORT_PCS_DW12_GRP_C,
+      BXT_PORT_TX_DW2_GRP_C,
+      BXT_PORT_TX_DW3_GRP_C,
+      BXT_PORT_TX_DW4_GRP_C,
       BXT_DE_PLL_CTL,
       HTOTAL_EDP,
       HBLANK_EDP,
@@ -528,12 +544,20 @@
       BXT_PORT_REF_DW3_A,
       BXT_PORT_REF_DW6_A,
       BXT_PORT_REF_DW8_A,
+      BXT_PORT_PCS_DW10_01_A,
       BXT_PORT_PCS_DW12_01_A,
+      BXT_PORT_TX_DW2_LN0_A,
+      BXT_PORT_TX_DW3_LN0_A,
+      BXT_PORT_TX_DW4_LN0_A,
       BXT_PORT_TX_DW14_LN0_A,
       BXT_PORT_TX_DW14_LN1_A,
       BXT_PORT_TX_DW14_LN2_A,
       BXT_PORT_TX_DW14_LN3_A,
-      BXT_PORT_PCS_DW12_GRP_A);
+      BXT_PORT_PCS_DW10_GRP_A,
+      BXT_PORT_PCS_DW12_GRP_A,
+      BXT_PORT_TX_DW2_GRP_A,
+      BXT_PORT_TX_DW3_GRP_A,
+      BXT_PORT_TX_DW4_GRP_A);
 
    pragma Warnings
      (GNATprove, Off, "pragma ""KEEP_NAMES"" ignored *(not yet supported)",
@@ -924,8 +948,6 @@
       BXT_PORT_PLL_8_A        => 16#16_2120# / Register_Width,
       BXT_PORT_PLL_9_A        => 16#16_2124# / Register_Width,
       BXT_PORT_PLL_10_A       => 16#16_2128# / Register_Width,
-      BXT_PORT_PCS_DW12_01_A  => 16#16_2430# / Register_Width,
-      BXT_PORT_PCS_DW12_GRP_A => 16#16_2c30# / Register_Width,
       BXT_PORT_PLL_EBB_0_B    => 16#06_c034# / Register_Width,
       BXT_PORT_PLL_EBB_4_B    => 16#06_c038# / Register_Width,
       BXT_PORT_PLL_0_B        => 16#06_c100# / Register_Width,
@@ -936,8 +958,6 @@
       BXT_PORT_PLL_8_B        => 16#06_c120# / Register_Width,
       BXT_PORT_PLL_9_B        => 16#06_c124# / Register_Width,
       BXT_PORT_PLL_10_B       => 16#06_c128# / Register_Width,
-      BXT_PORT_PCS_DW12_01_B  => 16#06_c430# / Register_Width,
-      BXT_PORT_PCS_DW12_GRP_B => 16#06_cc30# / Register_Width,
       BXT_PORT_PLL_EBB_0_C    => 16#06_c340# / Register_Width,
       BXT_PORT_PLL_EBB_4_C    => 16#06_c344# / Register_Width,
       BXT_PORT_PLL_0_C        => 16#06_c380# / Register_Width,
@@ -948,7 +968,19 @@
       BXT_PORT_PLL_8_C        => 16#06_c3a0# / Register_Width,
       BXT_PORT_PLL_9_C        => 16#06_c3a4# / Register_Width,
       BXT_PORT_PLL_10_C       => 16#06_c3a8# / Register_Width,
+
+      -- Broxton DDI PHY PCS? registers
+      BXT_PORT_PCS_DW10_01_A  => 16#16_2428# / Register_Width,
+      BXT_PORT_PCS_DW12_01_A  => 16#16_2430# / Register_Width,
+      BXT_PORT_PCS_DW10_GRP_A => 16#16_2c28# / Register_Width,
+      BXT_PORT_PCS_DW12_GRP_A => 16#16_2c30# / Register_Width,
+      BXT_PORT_PCS_DW10_01_B  => 16#06_c428# / Register_Width,
+      BXT_PORT_PCS_DW12_01_B  => 16#06_c430# / Register_Width,
+      BXT_PORT_PCS_DW10_01_C  => 16#06_c828# / Register_Width,
       BXT_PORT_PCS_DW12_01_C  => 16#06_c830# / Register_Width,
+      BXT_PORT_PCS_DW10_GRP_B => 16#06_cc28# / Register_Width,
+      BXT_PORT_PCS_DW12_GRP_B => 16#06_cc30# / Register_Width,
+      BXT_PORT_PCS_DW10_GRP_C => 16#06_ce28# / Register_Width,
       BXT_PORT_PCS_DW12_GRP_C => 16#06_ce30# / Register_Width,
 
       -- Broxton DDI PHY registers
@@ -973,18 +1005,36 @@
       BXT_PORT_CL2CM_DW6_BC   => 16#06_c358# / Register_Width,
 
       -- Broxton DDI PHY TX lane registers
+      BXT_PORT_TX_DW2_LN0_A   => 16#16_2508# / Register_Width,
+      BXT_PORT_TX_DW3_LN0_A   => 16#16_250c# / Register_Width,
+      BXT_PORT_TX_DW4_LN0_A   => 16#16_2510# / Register_Width,
       BXT_PORT_TX_DW14_LN0_A  => 16#16_2538# / Register_Width,
       BXT_PORT_TX_DW14_LN1_A  => 16#16_25b8# / Register_Width,
       BXT_PORT_TX_DW14_LN2_A  => 16#16_2738# / Register_Width,
       BXT_PORT_TX_DW14_LN3_A  => 16#16_27b8# / Register_Width,
+      BXT_PORT_TX_DW2_GRP_A   => 16#16_2d08# / Register_Width,
+      BXT_PORT_TX_DW3_GRP_A   => 16#16_2d0c# / Register_Width,
+      BXT_PORT_TX_DW4_GRP_A   => 16#16_2d10# / Register_Width,
+      BXT_PORT_TX_DW2_LN0_B   => 16#06_c508# / Register_Width,
+      BXT_PORT_TX_DW3_LN0_B   => 16#06_c50c# / Register_Width,
+      BXT_PORT_TX_DW4_LN0_B   => 16#06_c510# / Register_Width,
       BXT_PORT_TX_DW14_LN0_B  => 16#06_c538# / Register_Width,
       BXT_PORT_TX_DW14_LN1_B  => 16#06_c5b8# / Register_Width,
       BXT_PORT_TX_DW14_LN2_B  => 16#06_c738# / Register_Width,
       BXT_PORT_TX_DW14_LN3_B  => 16#06_c7b8# / Register_Width,
+      BXT_PORT_TX_DW2_GRP_B   => 16#06_cd08# / Register_Width,
+      BXT_PORT_TX_DW3_GRP_B   => 16#06_cd0c# / Register_Width,
+      BXT_PORT_TX_DW4_GRP_B   => 16#06_cd10# / Register_Width,
+      BXT_PORT_TX_DW2_LN0_C   => 16#06_c908# / Register_Width,
+      BXT_PORT_TX_DW3_LN0_C   => 16#06_c90c# / Register_Width,
+      BXT_PORT_TX_DW4_LN0_C   => 16#06_c910# / Register_Width,
       BXT_PORT_TX_DW14_LN0_C  => 16#06_c938# / Register_Width,
       BXT_PORT_TX_DW14_LN1_C  => 16#06_c9b8# / Register_Width,
       BXT_PORT_TX_DW14_LN2_C  => 16#06_cb38# / Register_Width,
       BXT_PORT_TX_DW14_LN3_C  => 16#06_cbb8# / Register_Width,
+      BXT_PORT_TX_DW2_GRP_C   => 16#06_cf08# / Register_Width,
+      BXT_PORT_TX_DW3_GRP_C   => 16#06_cf0c# / Register_Width,
+      BXT_PORT_TX_DW4_GRP_C   => 16#06_cf10# / Register_Width,
 
       -- Broxton DDI PHY ref registers
       BXT_PORT_REF_DW3_A      => 16#16_218c# / Register_Width,