gma broxton: Add signal level control for DDI PHYs
Other than for the DDIs of the Core processor series, we don't select
signal levels from a preconfigured set but have to program the indivi-
dual values.
Change-Id: I3ab4d5e2ed47db0d4ce47a17c4a5fb08b5416bc2
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/18425
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/common/broxton/hw-gfx-gma-ddi_phy.ads b/common/broxton/hw-gfx-gma-ddi_phy.ads
index a303b2f..98d0594 100644
--- a/common/broxton/hw-gfx-gma-ddi_phy.ads
+++ b/common/broxton/hw-gfx-gma-ddi_phy.ads
@@ -12,6 +12,8 @@
-- GNU General Public License for more details.
--
+with HW.GFX.GMA.DP_Info;
+
private package HW.GFX.GMA.DDI_Phy is
type T is (BC, A);
@@ -23,4 +25,22 @@
procedure Pre_PLL (Port_Cfg : Port_Config);
+ Max_V_Swing : constant DP_Info.DP_Voltage_Swing := DP_Info.VS_Level_3;
+
+ type Emph_Array is array (DP_Info.DP_Voltage_Swing) of DP_Info.DP_Pre_Emph;
+ Max_Pre_Emph : constant Emph_Array :=
+ (DP_Info.VS_Level_0 => DP_Info.Emph_Level_3,
+ DP_Info.VS_Level_1 => DP_Info.Emph_Level_2,
+ DP_Info.VS_Level_2 => DP_Info.Emph_Level_1,
+ others => DP_Info.Emph_Level_0);
+
+ procedure Set_DP_Signal_Levels
+ (Port : Digital_Port;
+ Train_Set : DP_Info.Train_Set);
+
+ type HDMI_Buf_Trans_Range is range 0 .. 9;
+ procedure Set_HDMI_Signal_Levels
+ (Port : DDI_Phy_Port;
+ Level : HDMI_Buf_Trans_Range);
+
end HW.GFX.GMA.DDI_Phy;